January 2026 Archives by author

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Starting: Thu Jan 1 00:17:01 GMT 2026
Ending: Sat Jan 31 17:55:45 GMT 2026
Messages: 2532

• [gcc r16-7097] libstdc++: Implement std::atomic::fetch_min/max   Soumya AR
• [gcc r16-6452] Daily bump.   GCC Administrator
• [gcc r13-10022] Daily bump.   GCC Administrator
• [gcc r14-12225] Daily bump.   GCC Administrator
• [gcc r15-10644] Daily bump.   GCC Administrator
• [gcc r16-6460] Daily bump.   GCC Administrator
• [gcc r13-10023] Daily bump.   GCC Administrator
• [gcc r14-12226] Daily bump.   GCC Administrator
• [gcc r15-10645] Daily bump.   GCC Administrator
• [gcc r16-6468] Daily bump.   GCC Administrator
• [gcc r13-10024] Daily bump.   GCC Administrator
• [gcc r14-12227] Daily bump.   GCC Administrator
• [gcc r15-10647] Daily bump.   GCC Administrator
• [gcc r16-6481] Daily bump.   GCC Administrator
• [gcc r13-10025] Daily bump.   GCC Administrator
• [gcc r14-12228] Daily bump.   GCC Administrator
• [gcc r15-10649] Daily bump.   GCC Administrator
• [gcc r16-6493] Daily bump.   GCC Administrator
• [gcc r13-10026] Daily bump.   GCC Administrator
• [gcc r14-12229] Daily bump.   GCC Administrator
• [gcc r15-10650] Daily bump.   GCC Administrator
• [gcc r16-6512] Daily bump.   GCC Administrator
• [gcc r13-10027] Daily bump.   GCC Administrator
• [gcc r14-12230] Daily bump.   GCC Administrator
• [gcc r15-10652] Daily bump.   GCC Administrator
• [gcc r16-6530] Daily bump.   GCC Administrator
• [gcc r13-10029] Daily bump.   GCC Administrator
• [gcc r14-12231] Daily bump.   GCC Administrator
• [gcc r15-10654] Daily bump.   GCC Administrator
• [gcc r16-6564] Daily bump.   GCC Administrator
• [gcc r13-10030] Daily bump.   GCC Administrator
• [gcc r14-12232] Daily bump.   GCC Administrator
• [gcc r15-10655] Daily bump.   GCC Administrator
• [gcc r16-6673] Daily bump.   GCC Administrator
• [gcc r13-10031] Daily bump.   GCC Administrator
• [gcc r14-12233] Daily bump.   GCC Administrator
• [gcc r15-10662] Daily bump.   GCC Administrator
• [gcc r16-6684] Daily bump.   GCC Administrator
• [gcc r13-10032] Daily bump.   GCC Administrator
• [gcc r14-12234] Daily bump.   GCC Administrator
• [gcc r15-10663] Daily bump.   GCC Administrator
• [gcc r16-6697] Daily bump.   GCC Administrator
• [gcc r13-10033] Daily bump.   GCC Administrator
• [gcc r14-12235] Daily bump.   GCC Administrator
• [gcc r15-10664] Daily bump.   GCC Administrator
• [gcc r16-6728] Daily bump.   GCC Administrator
• [gcc r13-10034] Daily bump.   GCC Administrator
• [gcc r14-12236] Daily bump.   GCC Administrator
• [gcc r15-10665] Daily bump.   GCC Administrator
• [gcc r16-6757] Daily bump.   GCC Administrator
• [gcc r13-10035] Daily bump.   GCC Administrator
• [gcc r14-12238] Daily bump.   GCC Administrator
• [gcc r15-10668] Daily bump.   GCC Administrator
• [gcc r16-6786] Daily bump.   GCC Administrator
• [gcc r13-10036] Daily bump.   GCC Administrator
• [gcc r14-12240] Daily bump.   GCC Administrator
• [gcc r15-10675] Daily bump.   GCC Administrator
• [gcc r16-6813] Daily bump.   GCC Administrator
• [gcc r13-10037] Daily bump.   GCC Administrator
• [gcc r14-12242] Daily bump.   GCC Administrator
• [gcc r15-10677] Daily bump.   GCC Administrator
• [gcc r16-6850] Daily bump.   GCC Administrator
• [gcc r13-10041] Daily bump.   GCC Administrator
• [gcc r14-12247] Daily bump.   GCC Administrator
• [gcc r15-10700] Daily bump.   GCC Administrator
• [gcc r16-6881] Daily bump.   GCC Administrator
• [gcc r13-10042] Daily bump.   GCC Administrator
• [gcc r14-12248] Daily bump.   GCC Administrator
• [gcc r15-10704] Daily bump.   GCC Administrator
• [gcc r16-6887] Daily bump.   GCC Administrator
• [gcc r13-10043] Daily bump.   GCC Administrator
• [gcc r14-12249] Daily bump.   GCC Administrator
• [gcc r15-10705] Daily bump.   GCC Administrator
• [gcc r16-6910] Daily bump.   GCC Administrator
• [gcc r13-10044] Daily bump.   GCC Administrator
• [gcc r14-12251] Daily bump.   GCC Administrator
• [gcc r15-10709] Daily bump.   GCC Administrator
• [gcc r16-6941] Daily bump.   GCC Administrator
• [gcc r13-10045] Daily bump.   GCC Administrator
• [gcc r14-12253] Daily bump.   GCC Administrator
• [gcc r15-10713] Daily bump.   GCC Administrator
• [gcc r16-6963] Daily bump.   GCC Administrator
• [gcc r13-10046] Daily bump.   GCC Administrator
• [gcc r14-12254] Daily bump.   GCC Administrator
• [gcc r15-10715] Daily bump.   GCC Administrator
• [gcc r16-6986] Daily bump.   GCC Administrator
• [gcc r13-10047] Daily bump.   GCC Administrator
• [gcc r14-12258] Daily bump.   GCC Administrator
• [gcc r15-10720] Daily bump.   GCC Administrator
• [gcc r16-7010] Daily bump.   GCC Administrator
• [gcc r13-10051] Daily bump.   GCC Administrator
• [gcc r14-12262] Daily bump.   GCC Administrator
• [gcc r15-10731] Daily bump.   GCC Administrator
• [gcc r16-7020] Daily bump.   GCC Administrator
• [gcc r13-10052] Daily bump.   GCC Administrator
• [gcc r14-12263] Daily bump.   GCC Administrator
• [gcc r15-10732] Daily bump.   GCC Administrator
• [gcc r16-7033] Daily bump.   GCC Administrator
• [gcc r13-10053] Daily bump.   GCC Administrator
• [gcc r14-12264] Daily bump.   GCC Administrator
• [gcc r15-10733] Daily bump.   GCC Administrator
• [gcc r16-7054] Daily bump.   GCC Administrator
• [gcc r13-10055] Daily bump.   GCC Administrator
• [gcc r14-12268] Daily bump.   GCC Administrator
• [gcc r15-10734] Daily bump.   GCC Administrator
• [gcc r16-7083] Daily bump.   GCC Administrator
• [gcc r13-10057] Daily bump.   GCC Administrator
• [gcc r14-12272] Daily bump.   GCC Administrator
• [gcc r15-10740] Daily bump.   GCC Administrator
• [gcc r16-7128] Daily bump.   GCC Administrator
• [gcc r13-10063] Daily bump.   GCC Administrator
• [gcc r14-12278] Daily bump.   GCC Administrator
• [gcc r15-10747] Daily bump.   GCC Administrator
• [gcc r16-7161] Daily bump.   GCC Administrator
• [gcc r13-10067] Daily bump.   GCC Administrator
• [gcc r14-12282] Daily bump.   GCC Administrator
• [gcc r15-10752] Daily bump.   GCC Administrator
• [gcc r16-7201] Daily bump.   GCC Administrator
• [gcc r13-10069] Daily bump.   GCC Administrator
• [gcc r14-12288] Daily bump.   GCC Administrator
• [gcc r15-10758] Daily bump.   GCC Administrator
• [gcc/devel/omp/gcc-15] tree-ssa-math-opts: Fix ICE if vectorizer produces IFN_SIN/COS calls   Arsen Arsenovic
• [gcc/devel/omp/gcc-15] ChangeLog.omp bump   Arsen Arsenovic
• [gcc r16-6521] aarch64: Add support for FEAT_PCDPHINT atomic_store intrinsics.   Richard Ball
• [gcc r16-6522] aarch64: Add support for __pldir intrinsic   Richard Ball
• [gcc r16-6717] aarch64: Update target checks for sme2 fp8   Claudio Bantaloukas
• [gcc r16-6719] aarch64: Add tests checking use of arm_sve.h et al in a pch [PR123457]   Claudio Bantaloukas
• [gcc r16-6720] aarch64: Fix copyright year.   Claudio Bantaloukas
• [gcc r16-6758] MAINTAINERS: add myself to write after approval   Daniel Barboza
• [gcc r16-6759] gcc/tree.h, match.pd: remove 'warn_strict_overflow' ref   Daniel Barboza
• [gcc r16-6774] expand: Handle variable-length vector constructors with debug [PR123392]   Tejas Belagod
• [gcc r15-10679] expand: Handle variable-length vector constructors with debug [PR123392]   Tejas Belagod
• [gcc r16-6653] RISC-V: Update tt-ascalon-d8's extension list [PR123492]   Peter Bergner
• [gcc r16-6785] RISC-V: Enable the ZD constraint only when xmipscbop is enabled [PR123092]   Peter Bergner
• [gcc r16-6999] RISC-V: Add zvfbfmin to tt-ascalon-d8's extension list [PR123492]   Peter Bergner
• [gcc r16-6593] libiberty/testsuite: make test-pexecute's -t option a little more useful   Jan Beulich
• [gcc r16-6533] tree-optimization/123316 - avoid ICE due to lack of PHI patterns   Richard Biener
• [gcc r16-6534] tree-optimization/123221 - ICE with conversion reduction   Richard Biener
• [gcc r16-6535] tree-optimization/123315 - reset LOOP_VINFO_USING_DECREMENTING_IV_P   Richard Biener
• [gcc r16-6544] testsuite/123353 - require little-endian for testcase   Richard Biener
• [gcc r16-6569] middle-end/123107 - avoid invalid vector folding   Richard Biener
• [gcc r16-6574] More verbose dumping on missed vector optabs   Richard Biener
• [gcc r16-6575] tree-optimization/123298 - fix backedge detection for VN alias walk   Richard Biener
• [gcc r16-6577] tree-optimization/123310 - wrong aggregate copy VN   Richard Biener
• [gcc r16-6578] vect: Generalise vect_add_slp_permutation [PR122793]   Richard Biener
• [gcc r16-6595] bugzilla: remove `gcc-bugs@` mailing list address   Richard Biener
• [gcc r15-10659] tree-optimization/123040 - handle nary -> ifn simplification in VN   Richard Biener
• [gcc r15-10660] c/123156 - overflow in shuffle mask for __builtin_shufflevector   Richard Biener
• [gcc r15-10661] testsuite/123353 - require little-endian for testcase   Richard Biener
• [gcc r16-6709] middle-end/123175 - fix parts of const VEC_PERM with relaxed input sizes   Richard Biener
• [gcc r16-6713] Fix extra_off mis-computation during aggregate copy VN   Richard Biener
• [gcc r16-6714] tree-optimization/122830 - move VN through aggregate copies   Richard Biener
• [gcc r16-6722] tree-optimization/123528 - tighten bool pattern check   Richard Biener
• [gcc r16-6734] tree-optimization/123539 - signed UB in vector reduction   Richard Biener
• [gcc r16-6743] middle-end/123573 - fix VEC_PERM folding more   Richard Biener
• [gcc r16-6766] tree-optimization/123190 - allow VF == 1 epilog vectorization   Richard Biener
• [gcc r16-6767] tree-optimization/123190 - fix costing of permuted contiguous loads   Richard Biener
• [gcc r16-6795] Fix testsuite fallout of VF == 1 epilogue vectorization change   Richard Biener
• [gcc r16-6796] Fix x86 testsuite fallout from VF == 1 epilogue vectorization change   Richard Biener
• [gcc r16-6891] target/123603 - add --param ix86-vect-compare-costs   Richard Biener
• [gcc r16-6896] tree-optimization/123602 - avoid PRE-inserting abnormal SSA refs   Richard Biener
• [gcc r16-6900] tree-optimization/123061 - invalid hoisting of division   Richard Biener
• [gcc r16-6914] Add phi_arg_edge_from_use helper   Richard Biener
• [gcc r16-6915] tree-optimization/123729 - fix reduction epilog flowing into abnormal edge   Richard Biener
• [gcc r16-6918] middle-end/123697 - fix .MASK_LOAD_LANES folding   Richard Biener
• [gcc r16-6972] tree-optimization/123756 - remove now bogus assert in reduction vect   Richard Biener
• [gcc r16-6973] tree-optimization/123755 - properly register loop mask for trapping call   Richard Biener
• [gcc r16-6980] tree-optimization/123741 - fix segfault with BB vect and masked stores   Richard Biener
• [gcc r16-6988] Avoid selecting masked epilogs for in-order reduction vectorization   Richard Biener
• [gcc r16-6990] tree-optimization/123771 - missing conversion of induction step   Richard Biener
• [gcc r16-6994] middle-end/123775 - add missing expand_vec_cond_expr_p to patterns   Richard Biener
• [gcc r16-6995] Add missing expand_vec_cond_expr_p to patterns   Richard Biener
• [gcc r15-10724] vect: Generalise vect_add_slp_permutation [PR122793]   Richard Biener
• [gcc r15-10725] middle-end/123107 - avoid invalid vector folding   Richard Biener
• [gcc r15-10726] tree-optimization/123602 - avoid PRE-inserting abnormal SSA refs   Richard Biener
• [gcc r15-10727] tree-optimization/123741 - fix segfault with BB vect and masked stores   Richard Biener
• [gcc r16-7036] Fixup gcc.dg/vect/costmodel/x86_64/costmodel-vect-epil-1.c   Richard Biener
• [gcc r16-7037] tree-optimization/123794 - fix OMP SIMD scalar call removal   Richard Biener
• [gcc r16-7039] tree-optimization/123755 - fix LEN-masking of trapping calls   Richard Biener
• [gcc r16-7040] tree-optimization/122474 - adjust check for .VEC_SHL_INSERT   Richard Biener
• [gcc r16-7070] debug/123376 - mangle decls referenced in initializers early   Richard Biener
• [gcc r16-7071] ipa/116296 - avoid overflow in modref_access_node::contains   Richard Biener
• [gcc r16-7099] tree-optimization/110043 - avoid overflow in pointer-query   Richard Biener
• [gcc r16-7111] tree-optimization/123537 - fix too permissive .REDUC_* folding   Richard Biener
• [gcc r16-7112] rtl-optimization/106859 - fix location dumping from var-tracking   Richard Biener
• [gcc r16-7113] ipa/111036 - strip nop conversions around __builtin_constant_p arguments   Richard Biener
• [gcc r16-7116] middle-end/123575 - fix ABS_EXPR folding for vectors   Richard Biener
• [gcc r16-7135] tree-optimization/116747 - ICE in cselim due to duplicate sinking   Richard Biener
• [gcc r16-7136] tree-optimization/123596 - fix partial virtual SSA update in eh_cleanup   Richard Biener
• [gcc r16-7143] tree-optimization/122537 - do not elide maybe_zero condition for wrapping IV   Richard Biener
• [gcc r16-7169] tree-optimization/109410 - ICE with noreturn and -g   Richard Biener
• [gcc r16-7185] debug/110885 - fix split-dwarf / debug-types interaction   Richard Biener
• [gcc r16-7197] debug/123886 - remove GTY((skip)) from external_die_map entry   Richard Biener
• [gcc r16-7198] middle-end/123887 - trapping conditional operand turned unconditional   Richard Biener
• [gcc r16-7215] middle-end/123887 - fix another missing side-effect check   Richard Biener
• [gcc r16-6704] testsuite: Remove lp64 requirement from gcc.target/i386/pr123121.c [PR123121]   Uros Bizjak
• [gcc r16-7123] i386: Use x >> ~y for x >> 31-y [PR36503]   Uros Bizjak
• [gcc r16-6474] Ada: Fix infinite loop on iterated element association with iterator and key   Eric Botcazou
• [gcc r15-10648] Ada: Fix infinite loop on iterated element association with iterator and key   Eric Botcazou
• [gcc r16-6517] Testsuite: Return ELF as object format for Solaris targets   Eric Botcazou
• [gcc r16-6518] Ada: Clear possible confusion in doc/install.texi   Eric Botcazou
• [gcc r16-6520] Fix gcc.c-torture/execute/pr110817-[13].c on the SPARC   Eric Botcazou
• [gcc r15-10653] Fix gcc.c-torture/execute/pr110817-[13].c on the SPARC   Eric Botcazou
• [gcc r16-6643] Ada: Fix suboptimal copy of discriminated record to local variable (2nd try)   Eric Botcazou
• [gcc r15-10702] Ada: Fix Default_Component_Value aspect wrongly ignored on derived type   Eric Botcazou
• [gcc r16-6878] Ada: Fix packed boolean array with Default_Component_Value aspect   Eric Botcazou
• [gcc r15-10703] Ada: Fix packed boolean array with Default_Component_Value aspect   Eric Botcazou
• [gcc r16-6953] Ada: Fix visibility issue on generic parent from nested generic package   Eric Botcazou
• [gcc r15-10714] Ada: Fix visibility issue on generic parent from nested generic package   Eric Botcazou
• [gcc r16-7126] Ada: Fix stack corruption with concatenation and 'Image of composite type   Eric Botcazou
• [gcc r16-7127] Ada: Fix crash on Unchecked_Union parameter with -gnateV -gnata   Eric Botcazou
• [gcc r15-10745] Ada: Fix stack corruption with concatenation and 'Image of composite type   Eric Botcazou
• [gcc r15-10746] Ada: Fix crash on Unchecked_Union parameter with -gnateV -gnata   Eric Botcazou
• [gcc r16-7156] Ada: Fix internal error on equality test with empty container   Eric Botcazou
• [gcc r15-10751] Ada: Fix internal error on equality test with empty container   Eric Botcazou
• [gcc r16-7186] Ada: Fix spurious visibility error from limited_with clause in hierarchy   Eric Botcazou
• [gcc r15-10757] Ada: Fix spurious visibility error from limited_with clause in hierarchy   Eric Botcazou
• [gcc r14-12287] Ada: Fix spurious visibility error from limited_with clause in hierarchy   Eric Botcazou
• [gcc r16-7187] Add missing PR reference   Eric Botcazou
• [gcc r16-7195] Ada: Fix regression in visibility for nested use_type_clauses   Eric Botcazou
• [gcc r16-7052] libphobos: Bump soname to version 7 [PR122800]   Iain Buclaw
• [gcc r16-7076] d: Fix root modules have no file location set [PR122817]   Iain Buclaw
• [gcc r15-10737] d: Fix root modules have no file location set [PR122817]   Iain Buclaw
• [gcc r16-7082] d: Side effects not evaluated for array literals on stack [PR120096]   Iain Buclaw
• [gcc r15-10739] d: Side effects not evaluated for array literals on stack [PR120096]   Iain Buclaw
• [gcc r14-12271] d: Side effects not evaluated for array literals on stack [PR120096]   Iain Buclaw
• [gcc r13-10056] d: Side effects not evaluated for array literals on stack [PR120096]   Iain Buclaw
• [gcc r16-7118] d: RVO/NRVO not done when returning a copy constructor   Iain Buclaw
• [gcc r15-10741] d: RVO/NRVO not done when returning a copy constructor   Iain Buclaw
• [gcc r14-12273] d: RVO/NRVO not done when returning a copy constructor   Iain Buclaw
• [gcc r13-10058] d: RVO/NRVO not done when returning a copy constructor   Iain Buclaw
• [gcc r16-7120] d: Fix ICE: in expand_asm_stmt, at cfgexpand.cc:3445 [PR121477]   Iain Buclaw
• [gcc r15-10742] d: Fix ICE: in expand_asm_stmt, at cfgexpand.cc:3445 [PR121477]   Iain Buclaw
• [gcc r14-12274] d: Fix ICE: in expand_asm_stmt, at cfgexpand.cc:3445 [PR121477]   Iain Buclaw
• [gcc r13-10059] d: Fix ICE: in expand_asm_stmt, at cfgexpand.cc:3445 [PR121477]   Iain Buclaw
• [gcc r16-7124] d: Fix ICE: in output_constructor_regular_field, at varasm.cc:5500 [PR123798]   Iain Buclaw
• [gcc r15-10743] d: Fix ICE: in output_constructor_regular_field, at varasm.cc:5500 [PR123798]   Iain Buclaw
• [gcc r14-12275] d: Fix ICE: in output_constructor_regular_field, at varasm.cc:5500 [PR123798]   Iain Buclaw
• [gcc r13-10060] d: Fix ICE: in output_constructor_regular_field, at varasm.cc:5500 [PR123798]   Iain Buclaw
• [gcc r16-7125] d: Fix ICE in ExprVisitor::visit, at d/expr.cc:2224 [PR123419]   Iain Buclaw
• [gcc r15-10744] d: Fix ICE in ExprVisitor::visit, at d/expr.cc:2224 [PR123419]   Iain Buclaw
• [gcc r14-12276] d: Fix ICE in ExprVisitor::visit, at d/expr.cc:2224 [PR123419]   Iain Buclaw
• [gcc r13-10061] d: Fix ICE in ExprVisitor::visit, at d/expr.cc:2224 [PR123419]   Iain Buclaw
• [gcc r14-12277] d: Fix internal compiler error: in visit, at d/decl.cc:838 [PR119799]   Iain Buclaw
• [gcc r13-10062] d: Fix internal compiler error: in visit, at d/decl.cc:838 [PR119799]   Iain Buclaw
• [gcc r16-7138] d: Fix buffer overflow detected with -defaultlib= and -debuglib= [PR123349]   Iain Buclaw
• [gcc r15-10748] d: Fix buffer overflow detected with -defaultlib= and -debuglib= [PR123349]   Iain Buclaw
• [gcc r14-12279] d: Fix buffer overflow detected with -defaultlib= and -debuglib= [PR123349]   Iain Buclaw
• [gcc r13-10064] d: Fix buffer overflow detected with -defaultlib= and -debuglib= [PR123349]   Iain Buclaw
• [gcc r16-7144] d: Fix ICE in gimplify_expr with const ref noreturn parameters [PR123046]   Iain Buclaw
• [gcc r15-10749] d: Fix ICE in gimplify_expr with const ref noreturn parameters [PR123046]   Iain Buclaw
• [gcc r14-12280] d: Fix ICE in gimplify_expr with const ref noreturn parameters [PR123046]   Iain Buclaw
• [gcc r13-10065] d: Fix ICE in gimplify_expr with const ref noreturn parameters [PR123046]   Iain Buclaw
• [gcc r16-7147] d: Fix Segmentation fault with redeclared symbols [PR123407]   Iain Buclaw
• [gcc r15-10750] d: Fix Segmentation fault with redeclared symbols [PR123407]   Iain Buclaw
• [gcc r14-12281] d: Fix Segmentation fault with redeclared symbols [PR123407]   Iain Buclaw
• [gcc r13-10066] d: Fix Segmentation fault with redeclared symbols [PR123407]   Iain Buclaw
• [gcc r16-7167] d: Fix infinite loop in dump_generic_node [PR123264]   Iain Buclaw
• [gcc r16-7168] d, darwin: Add Apple as a predefined version   Iain Buclaw
• [gcc r15-10756] d: Fix infinite loop in dump_generic_node [PR123264]   Iain Buclaw
• [gcc r14-12286] d: Fix infinite loop in dump_generic_node [PR123264]   Iain Buclaw
• [gcc r13-10068] d: Fix infinite loop in dump_generic_node [PR123264]   Iain Buclaw
• [gcc r16-7170] d: Fix ICE in dwarf2out_abstract_function, at dwarf2out.cc:23771 [PR123263]   Iain Buclaw
• [gcc r16-7171] d: Refactor for changes to dmd front-end inteface   Iain Buclaw
• [gcc r16-7181] d: Merge upstream dmd, druntime 1017635a96, phobos 5a142da0a   Iain Buclaw
• [gcc r16-7211] d: Merge upstream dmd, druntime e1f6680f50, phobos f87979028   Iain Buclaw
• [gcc r16-6453] c-c++-common/gomp/uses_allocators-8.c: Add missing -fdump-tree-original [PR123299]   Tobias Burnus
• [gcc r16-6552] OpenMP: Add early C/C++ parser support for 'groupprivate' directive   Tobias Burnus
• [gcc/devel/omp/gcc-15] (172 commits) Merge branch 'releases/gcc-15' into devel/omp/gcc-15   Tobias Burnus
• [gcc/devel/omp/gcc-15] Merge branch 'releases/gcc-15' into devel/omp/gcc-15   Tobias Burnus
• [gcc r16-6899] GCN - doc/install.texi: Fix gfx9-4-generic llvm-mc requirements   Tobias Burnus
• [gcc r16-7063] install.texi: Update GCN's newlib requirements   Tobias Burnus
• [gcc r16-7067] Fortran/OpenMP: Reject device-local var in MAP clause   Tobias Burnus
• [gcc r16-6500] aarch64 doc: Fix incorrect function name   Alice Carlotti
• [gcc r16-6501] aarch64: Restrict SME_LUTv2 instructions to streaming mode   Alice Carlotti
• [gcc r16-6847] aarch64: Accept hyphenated extensions in --with-arch [PR123460]   Alice Carlotti
• [gcc r15-10681] aarch64: Accept hyphenated extensions in --with-arch [PR123460]   Alice Carlotti
• [gcc r14-12246] aarch64: Accept hyphenated extensions in --with-arch [PR123460]   Alice Carlotti
• [gcc r13-10040] aarch64: Accept hyphenated extensions in --with-arch [PR123460]   Alice Carlotti
• [gcc r16-6701] AutoFDO: Fix missing null-pointer check in offline_unrealized_inlines   Dhruv Chawla
• [gcc r16-6731] RISC-V: Add support for _BitInt [PR117581]   Kito Cheng
• [gcc r16-6732] VN: Fix VN ICE for large _BitInt types   Kito Cheng
• [gcc r16-6496] AArch64: Add if-conversion target cost model [PR123017]   Tamar Christina
• [gcc r16-6497] AArch64: tweak inner-loop penalty when doing outer-loop vect [PR121290]   Tamar Christina
• [gcc r16-6506] middle-end: teach gimple_could_trap_p to handle __builtin calls [PR122103]   Tamar Christina
• [gcc r16-6507] middle-end: Add new conditional IFNs for existing math IFNs [PR122103]   Tamar Christina
• [gcc r16-6508] middle-end: extend fma -> fms transformation to conditional optab [PR122103]   Tamar Christina
• [gcc r16-6509] vect: update tests for -ftrapping-math support [PR122103]   Tamar Christina
• [gcc r16-6510] vect: teach if-convert to predicate __builtin calls [PR122103]   Tamar Christina
• [gcc r16-6511] vect: teach vectorizable_call to predicate calls when they can trap [PR122103]   Tamar Christina
• [gcc r16-6523] vect: Add check for BUILT_IN_NORMAL to ifcvt [PR122103]   Tamar Christina
• [gcc r16-7035] vect: distinguish between MASK_CALL and non-trapping calls [PR123628]   Tamar Christina
• [gcc r16-7057] middle-end: teach convert_mult_to_fma handle casts between addend and multiplicant [PR122749]   Tamar Christina
• [gcc r16-6825] gccrs: nr: Add better error to unresolved attribute macro   Arthur Cohen
• [gcc r16-6826] gccrs: remove match arm pattern vector to single pattern   Arthur Cohen
• [gcc r16-6827] gccrs: Fix rogue macro error during lowering on expansion failure   Arthur Cohen
• [gcc r16-6828] gccrs: Move old parser error classes to error header   Arthur Cohen
• [gcc r16-6829] gccrs: Use error collector in the parser   Arthur Cohen
• [gcc r16-6830] gccrs: Use tl::expected for parse_block_expr results   Arthur Cohen
• [gcc r16-6831] gccrs: Remove redundant error types   Arthur Cohen
• [gcc r16-6832] gccrs: Use error wrapper when required instead of nullptr   Arthur Cohen
• [gcc r16-6833] gccrs: Explicitely specify templates for GCC5   Arthur Cohen
• [gcc r16-6834] gccrs: forever-stack: Display depth in debug string   Arthur Cohen
• [gcc r16-6835] gccrs: nr: Add prelude field to NRCtx, and fill it upon encountering a prelude.   Arthur Cohen
• [gcc r16-6836] gccrs: forever-stack: Add extra path resolution from a known NodeId.   Arthur Cohen
• [gcc r16-6837] gccrs: nr: Do prelude resolution for Identifiers   Arthur Cohen
• [gcc r16-6838] gccrs: nr: Ignore errors when doing prelude resolution   Arthur Cohen
• [gcc r16-6839] gccrs: util/attributes: error on malformed #[link_name] input   Arthur Cohen
• [gcc r16-6840] gccrs: add redudant semicolon lint   Arthur Cohen
• [gcc r16-6841] gccrs: util/attributes: error on malformed #[target_feature] input   Arthur Cohen
• [gcc r16-6842] gccrs: util/attributes: error on malformed #[no_mangle] input   Arthur Cohen
• [gcc r16-6843] gccrs: add unused label lint   Arthur Cohen
• [gcc r16-6844] gccrs: handle outer attributes in expression parsing   Arthur Cohen
• [gcc r16-6845] gccrs: Adds and fixes tests for outer attributes in expression   Arthur Cohen
• [gcc r16-6846] gccrs: Fix empty struct constructors causing ICE during type checking   Arthur Cohen
• [gcc r16-6967] MAINTAINERS: Add myself to Write After Approval and DCO   Alejandro Colomar
• [gcc r16-6968] gcc/testsuite/gcc.dg/maxof-compile.c: Add tests using qualifiers   Alejandro Colomar
• [gcc r16-7172] aarch64: Fix gating of fp8 intrinsics [PR123206]   Alex Coplan
• [gcc r16-6761] x86: Disable tight loop alignment for m_CORE_ATOM   Lili Cui
• [gcc r16-6933] doc: fix documentation of -Wsfinae-incomplete [PR123639]   Giuseppe D'Angelo
• [gcc r16-6587] RISC-V: -mrvv-max-lmul=conv-dynamic [PR122846].   Robin Dapp
• [gcc r16-6671] forwprop: Use ssizetype for mask [PR123414].   Robin Dapp
• [gcc r16-6740] rtlanal: Determine nonzero bits of popcount from operand [PR123501].   Robin Dapp
• [gcc r16-6741] if-conv: Prevent vector types in scalar cond reduction [PR123301].   Robin Dapp
• [gcc r16-6742] forwprop: Fix type mismatch in vec constructor [PR123525].   Robin Dapp
• [gcc r16-6974] RISC-V: Correct builtin registration order [PR123279].   Robin Dapp
• [gcc r16-6975] RISC-V: Fix intrinsic FoF load at -O0 [PR122869].   Robin Dapp
• [gcc r16-6976] forwprop: More nop-conversion handling [PR123731].   Robin Dapp
• [gcc r16-7005] RISC-V: testsuite: Add vector requirement to test.   Robin Dapp
• [gcc r16-7006] vect: Only scale vec_offset once [PR123767].   Robin Dapp
• [gcc r16-7007] RISC-V: Fix indexed store output template [PR123780].   Robin Dapp
• [gcc r16-7068] forwprop: Pun with integer type if needed [PR123799].   Robin Dapp
• [gcc r16-7122] RISC-V: Fix ABI vector passing on stack and GPR [PR123824].   Robin Dapp
• [gcc r16-7148] RISC-V: testsuite: Add zvl requirement to PR123626.   Robin Dapp
• [gcc r16-7149] RISC-V: Handle VL-setting FoF loads. [PR123806]   Robin Dapp
• [gcc r16-6459] Fortran: Generate a runtime error on recursive I/O   Jerry DeLisle
• [gcc r16-6461] Fortran: Fix tab not ignored in print statement.   Jerry DeLisle
• [gcc r16-6469] Revert "Fortran: Generate a runtime error on recursive I/O"   Jerry DeLisle
• [gcc r16-6526] Fortran: Allow BLANK= in OPEN with -std=f95   Jerry DeLisle
• [gcc r16-6567] Fortran: Fix namelist with use association and renaming   Jerry DeLisle
• [gcc r16-6568] Fortran: Fix namelist with use association and renaming   Jerry DeLisle
• [gcc r16-6656] Fortran: [PR123483] Fix duplicate finalization   Jerry DeLisle
• [gcc r16-6685] Fortran: [PR123012] Silent acceptance of unquoted character items   Jerry DeLisle
• [gcc r16-6699] Fortran: Test cases from previously fixed bug   Jerry DeLisle
• [gcc r16-6726] Fortran: Add additional checks for constant expressions.   Jerry DeLisle
• [gcc r16-6748] Fortran: Detect missing quote in namelist read.   Jerry DeLisle
• [gcc r16-6855] Fortran: Fix accepts invalid implicit none (external)   Jerry DeLisle
• [gcc r16-6856] Fortran: Documentation update on -fdefault-real-8 and family   Jerry DeLisle
• [gcc r16-6857] Fortran: Add new test case   Jerry DeLisle
• [gcc r16-6888] Fortran: Fix ICE on invalid code   Jerry DeLisle
• [gcc r16-7017] Fortran: Fix missed finalization   Jerry DeLisle
• [gcc r16-7200] Fortran: Fix PR123868   Jerry DeLisle
• [gcc r16-6775] AArch64: Improve immediate generation [PR 114528]   Wilco Dijkstra
• [gcc r16-6776] AArch64: Use anchors for FP constants [PR 121240]   Wilco Dijkstra
• [gcc r16-7064] AArch64: Allow invert for shift counts [PR 123792]   Wilco Dijkstra
• [gcc r16-7065] AArch64: Block symbols in literal pools [PR 123791]   Wilco Dijkstra
• [gcc r16-7066] fortran: Allow vector math functions only with fast-math [PR 118955]   Wilco Dijkstra
• [gcc r16-6482] testsuite: Require effective target bitint for test case   Dimitar Dimitrov
• [gcc r16-6851] cobol: Support National characters and Unicode runtime encoding.   Robert Dubner
• [gcc r16-6889] libstdc++: Fix std::erase_if behavior for std::__debug containers   Francois Dumont
• [gcc r16-6541] arm: avoid UB in arm_gen_constant [PR123390]   Richard Earnshaw
• [gcc r16-6560] arm: add test for recent combine fix [PR121773]   Richard Earnshaw
• [gcc r16-6650] arm: prevent impossible tail- long-calls with static chain [PR119430]   Richard Earnshaw
• [gcc r16-6982] arm: fix unrecognized HFmode min/max insns on neon [PR123742]   Richard Earnshaw
• [gcc r15-10719] arm: fix unrecognized HFmode min/max insns on neon [PR123742]   Richard Earnshaw
• [gcc r14-12255] arm: fix unrecognized HFmode min/max insns on neon [PR123742]   Richard Earnshaw
• [gcc r16-7151] arm: testsuite: Use test framework to set arch in stack-protector-7   Richard Earnshaw
• [gcc r16-7154] testsuite: require arm_v8_3a_fp16_complex_neon for complex fp16 tests   Richard Earnshaw
• [gcc r16-7155] testsuite: arm: rework some target-supports checks to use -mfpu=auto   Richard Earnshaw
• [gcc r16-6524] xtensa: Small changes to 'return' insn pattern   Max Filippov
• [gcc r16-6573] s390: Remove volatile check from constraints A[QRST]   Stefan Schulze Frielinghaus
• [gcc r16-6649] s390: Fix operand modifier c   Stefan Schulze Frielinghaus
• [gcc r16-6682] s390: Add HF mode support   Stefan Schulze Frielinghaus
• [gcc r16-6805] Deal with combinations of hard register constraints   Stefan Schulze Frielinghaus
• [gcc r16-6806] ira: Implicit uses via hard register constraints   Stefan Schulze Frielinghaus
• [gcc r16-6894] s390: Deprecate -m31   Stefan Schulze Frielinghaus
• [gcc r16-6957] s390: Don't emulate vec_cmpgtuv1tiv1ti for VXE3 [PR122781]   Stefan Schulze Frielinghaus
• [gcc r16-6783] MAINTAINERS: update my email address   Vineet Gupta
• [gcc r16-6686] remove inclusion of tickLib.h from gthr-vxworks.h   Olivier Hainque
• [gcc r16-6528] gcov: Fix counter update method selection   Sebastian Huber
• [gcc r16-7075] Remove impossible speculation in ipa_polymorphic_call_context::possible_dynamic_type_change   Jan Hubicka
• [gcc r16-6537] ipa-cp: Move decision to clone for all contexts to decision stage   Martin Jambor
• [gcc r16-6538] ipa-cp: Multiple sweeps over the call-graph in the decision stage   Martin Jambor
• [gcc r16-6651] ipa-cp: Better opportunity evaluation and ranking   Martin Jambor
• [gcc r16-6652] ipa-cp: Use the VR and bits lattices for clones of non-local functions too   Martin Jambor
• [gcc r16-6718] ipa-cp: Fix ipa-bit-cp test for recipient_only lattices   Martin Jambor
• [gcc r16-6782] ipa-cp: Always return the right type in ipa_value_from_jfunc (PR123542)   Martin Jambor
• [gcc r16-6818] ipa-cp: Fix devirt bonus for targets that cannot be inlined   Martin Jambor
• [gcc r16-7058] testsuite: only test with LTO if LTO support is actually configured   Sam James
• [gcc r16-6702] [rs6000] [testsuite] Fix test-frame-related.c [PR123129]   Surya Kumari Jangala
• [gcc r13-10028] isel: Check bounds before converting VIEW_CONVERT to VEC_SET.   Avinash Jayakar
• [gcc r13-10048] rs6000: Do not reorder operands for vec_pack_to_short_fp32 based on endianness   Avinash Jayakar
• [gcc r14-12261] rs6000: Do not reorder operands for vec_pack_to_short_fp32 based on endianness   Avinash Jayakar
• [gcc r15-10723] rs6000: Do not reorder operands for vec_pack_to_short_fp32 based on endianness   Avinash Jayakar
• [gcc r16-6455] Update copyright dates.   Jakub Jelinek
• [gcc r16-6456] Rotate ChangeLog files.   Jakub Jelinek
• [gcc r16-6457] Update Copyright year in ChangeLog files   Jakub Jelinek
• [gcc r16-6462] c++: Fix up is_late_template_attribute for [[maybe_unused]] [PR123277]   Jakub Jelinek
• [gcc r16-6465] Update copyright years.   Jakub Jelinek
• [gcc r16-6475] c++: Fix error recovery for invalid arrays [PR123331]   Jakub Jelinek
• [gcc r16-6476] c++: Fix up check for typeid on polymorphic type before C++20 [PR123347]   Jakub Jelinek
• [gcc r16-6477] c++: Allow gnu::gnu_inline inline methods to be key methods [PR123326]   Jakub Jelinek
• [gcc/redhat/heads/gcc-16-branch] (166 commits) Merge commit 'r16-6477-gd5743234731ecc62d889e297a7576561600   Jakub Jelinek
• [gcc(refs/vendors/redhat/heads/gcc-16-branch)] Merge commit 'r16-6477-gd5743234731ecc62d889e297a7576561600da41d' into redhat/gcc-16-branch   Jakub Jelinek
• [gcc r16-6478] widening_mul: Fix up .SAT_{ADD, SUB, MUL} pattern recognition [PR123372]   Jakub Jelinek
• [gcc r16-6516] tree-object-size: Deterministic SSA generation [PR123351]   Jakub Jelinek
• [gcc r16-6547] libstdc++: Use gnu_inline attribute on constexpr exception methods [PR123183]   Jakub Jelinek
• [gcc r16-6548] combine: Fix up serious regression in try_combine [PR121773]   Jakub Jelinek
• [gcc r16-6571] testsuite: Add testcase for already fixed test [PR121675]   Jakub Jelinek
• [gcc r16-6572] testsuite: Fix up pr123319.c [PR123319]   Jakub Jelinek
• [gcc r16-6588] stmt: Fix up parse_input_constraint [PR111817]   Jakub Jelinek
• [gcc r16-6642] i386: Add OPTION_MASK_ISA_64BIT to 4 non-ia32 builtins [PR123489]   Jakub Jelinek
• [gcc r16-6660] doc: List more valid -x option arguments   Jakub Jelinek
• [gcc r16-6661] c: Optimize TARGET_EXPRs for _Atomic loads [PR123475]   Jakub Jelinek
• [gcc r16-6669] Update Copyright for gen-evolution.awk and gen-cxxapi-file.py   Jakub Jelinek
• [gcc r16-6677] ranger: Verify gimple_call_num_args for several builtins [PR123431]   Jakub Jelinek
• [gcc r16-6678] toplevel: Unbreak Ada build [PR123490]   Jakub Jelinek
• [gcc/redhat/heads/gcc-16-branch] (202 commits) Merge commit 'r16-6678-g5079424ade2deddfa8d39a48a892f60679e   Jakub Jelinek
• [gcc(refs/vendors/redhat/heads/gcc-16-branch)] Merge commit 'r16-6678-g5079424ade2deddfa8d39a48a892f60679e4e32d' into redhat/gcc-16-branch   Jakub Jelinek
• [gcc r16-6705] c++: Remove gnu::gnu_inline attribute on inheriting ctors [PR123526]   Jakub Jelinek
• [gcc r16-6706] simplify-rtx: Fix up shift/rotate VOIDmode count handling [PR123523]   Jakub Jelinek
• [gcc r16-6715] s390: Fix ABI issue in libstdc++.so.6   Jakub Jelinek
• [gcc r16-6716] Bump BASE-VER to 16.0.1 now that we are in stage4.   Jakub Jelinek
• [gcc/redhat/heads/gcc-16-branch] (48 commits) Merge commit 'r16-6725-g716f4482c5617f0525a1853c447e525c3c1   Jakub Jelinek
• [gcc(refs/vendors/redhat/heads/gcc-16-branch)] Merge commit 'r16-6725-g716f4482c5617f0525a1853c447e525c3c1771ba' into redhat/gcc-16-branch   Jakub Jelinek
• [gcc r16-6736] Use -latomic_asneeded or -lgcc_s_asneeded to workaround libtool issues [PR123396]   Jakub Jelinek
• [gcc/redhat/heads/gcc-16-branch] (18 commits) Merge commit 'r16-6742-g939dd2324e0f1c7cac49d2635532f08762b   Jakub Jelinek
• [gcc(refs/vendors/redhat/heads/gcc-16-branch)] Merge commit 'r16-6742-g939dd2324e0f1c7cac49d2635532f08762b67674' into redhat/gcc-16-branch   Jakub Jelinek
• [gcc r16-6765] simplify-rtx: Fix up SUBREG and LSHIFTRT order canonicalization for AND with constant [PR123544]   Jakub Jelinek
• [gcc r16-6768] combine: Partially revert the r12-4475 changes [PR120250]   Jakub Jelinek
• [gcc r16-6769] defaults: Use argument in default EH_RETURN_DATA_REGNO definition [PR123115]   Jakub Jelinek
• [gcc r16-6777] c++: Don't ICE on computed goto in potential_constant_expression_1 [PR123551]   Jakub Jelinek
• [gcc r16-6794] testsuite: Add testcase for already fixed PR [PR120322]   Jakub Jelinek
• [gcc r16-6802] compare-debug: Don't print discriminators for -fdump-final-insns= [PR121045]   Jakub Jelinek
• [gcc r16-6809] libstdc++: Fix __cpp_impl_reflection comparisons   Jakub Jelinek
• [gcc/redhat/heads/gcc-16-branch] (68 commits) Merge commit 'r16-6809-gdc716fb66a7cdfc1ded12d861b3a7daf3cb   Jakub Jelinek
• [gcc(refs/vendors/redhat/heads/gcc-16-branch)] Merge commit 'r16-6809-gdc716fb66a7cdfc1ded12d861b3a7daf3cbe8b20' into redhat/gcc-16-branch   Jakub Jelinek
• [gcc r16-6810] c-family: Regenerate c.opt.urls   Jakub Jelinek
• [gcc r16-6816] i386: Fix up movhf_mask constraints [PR123607]   Jakub Jelinek
• [gcc r16-6817] c, c++: Fix vector enum division handling [PR123437]   Jakub Jelinek
• [gcc r15-10682] i386: Obfuscate avx10_2bf16intrin.h inline function arguments [PR123155]   Jakub Jelinek
• [gcc r15-10683] i386: Obfuscate _mm_maskmove_si64 local variable [PR123155]   Jakub Jelinek
• [gcc r15-10684] docs: Fix up typo in --with-tls= description   Jakub Jelinek
• [gcc r15-10685] ++: Fix up cp_compare_floating_point_conversion_ranks for dfp [PR122834]   Jakub Jelinek
• [gcc r15-10686] c++: Fix stabilization of bitfields [PR122772]   Jakub Jelinek
• [gcc r15-10687] c++: Suppress -Wreturn-type warnings for functions with failed assertions [PR91388]   Jakub Jelinek
• [gcc r15-10688] i386: Fix up expansion of 2 keylocker and one user_msr builtin [PR123217]   Jakub Jelinek
• [gcc r15-10689] c++: Fix error recovery for invalid arrays [PR123331]   Jakub Jelinek
• [gcc r15-10690] widening_mul: Fix up .SAT_{ADD, SUB, MUL} pattern recognition [PR123372]   Jakub Jelinek
• [gcc r15-10691] tree-object-size: Deterministic SSA generation [PR123351]   Jakub Jelinek
• [gcc r15-10692] combine: Fix up serious regression in try_combine [PR121773]   Jakub Jelinek
• [gcc r15-10693] stmt: Fix up parse_input_constraint [PR111817]   Jakub Jelinek
• [gcc r15-10694] i386: Add OPTION_MASK_ISA_64BIT to 4 non-ia32 builtins [PR123489]   Jakub Jelinek
• [gcc r15-10695] doc: List more valid -x option arguments   Jakub Jelinek
• [gcc r15-10696] ranger: Verify gimple_call_num_args for several builtins [PR123431]   Jakub Jelinek
• [gcc r15-10697] simplify-rtx: Fix up shift/rotate VOIDmode count handling [PR123523]   Jakub Jelinek
• [gcc r15-10698] combine: Partially revert the r12-4475 changes [PR120250]   Jakub Jelinek
• [gcc r15-10699] i386: Fix up movhf_mask constraints [PR123607]   Jakub Jelinek
• [gcc r16-6854] tree: Handle ::operator {new, delete} function templates as uncertain matches [PR123513]   Jakub Jelinek
• [gcc r15-10701] tree: Handle ::operator {new, delete} function templates as uncertain matches [PR123513]   Jakub Jelinek
• [gcc r16-6859] Regenerate cobol lang.opt.urls   Jakub Jelinek
• [gcc r16-6892] libatomic: Change installed libatomic_asneeded.a into a symlink [PR123650]   Jakub Jelinek
• [gcc r16-6893] vect-generic: Fix up expand_vector_mult [PR123656]   Jakub Jelinek
• [gcc r16-6897] c++: Make metafns.{gperf,h} usable in C++14   Jakub Jelinek
• [gcc r16-6911] cobol: Fix up -Wmove-index option description   Jakub Jelinek
• [gcc r16-6916] testsuite, cobol, modula2, rust, algol68: Extend help.exp testing and fix reported bugs   Jakub Jelinek
• [gcc r16-6917] libstdc++: Disable __cpp_lib_reflection for old CXX ABI   Jakub Jelinek
• [gcc r16-6925] aarch64: Ignore debug stmts in aarch64_possible_by_lane_insn_p [PR123724]   Jakub Jelinek
• [gcc r16-6928] c++: Fix -Wmisleading-indentation ICE on expansion stmt [PR123694]   Jakub Jelinek
• [gcc/redhat/heads/gcc-15-branch] (117 commits) Merge commit 'r15-10710-gb327411e4cecca2e77b30573b13ec9581c   Jakub Jelinek
• [gcc(refs/vendors/redhat/heads/gcc-15-branch)] Merge commit 'r15-10710-gb327411e4cecca2e77b30573b13ec9581cd698b2' into redhat/gcc-15-branch   Jakub Jelinek
• [gcc r16-6954] c++: Fix ICE with constant evaluation of a = {CLOBBER} with ptrmemfn [PR123677]   Jakub Jelinek
• [gcc r16-6955] c++: Fix ICE in build_base_path -> resolves_to_fixed_type_p -> fixed_type_or_null [PR123692]   Jakub Jelinek
• [gcc r16-6956] testsuite: Add testcase for already fixed PR [PR123744]   Jakub Jelinek
• [gcc r16-6970] unswitch: Fix up one unguarded fprintf (dump_file, ...) [PR123736]   Jakub Jelinek
• [gcc r16-6979] testsuite: Add testcase for already fixed PR [PR123753]   Jakub Jelinek
• [gcc/redhat/heads/gcc-16-branch] (176 commits) Merge commit 'r16-6984-g2ab314d52bf762059d6c15caf0071513811   Jakub Jelinek
• [gcc(refs/vendors/redhat/heads/gcc-16-branch)] Merge commit 'r16-6984-g2ab314d52bf762059d6c15caf007151381180773' into redhat/gcc-16-branch   Jakub Jelinek
• [gcc r16-6989] openmp: Fix up OpenMP loop parsing in templates [PR123597]   Jakub Jelinek
• [gcc r16-6991] builtins: Only fold abs/absu if it is sane [PR123703]   Jakub Jelinek
• [gcc r15-10728] unswitch: Fix up one unguarded fprintf (dump_file, ...) [PR123736]   Jakub Jelinek
• [gcc r15-10729] openmp: Fix up OpenMP loop parsing in templates [PR123597]   Jakub Jelinek
• [gcc r15-10730] builtins: Only fold abs/absu if it is sane [PR123703]   Jakub Jelinek
• [gcc/redhat/heads/gcc-15-branch] (21 commits) Merge commit 'r15-10730-g33a0437ba5984e230488daf67207354172   Jakub Jelinek
• [gcc(refs/vendors/redhat/heads/gcc-15-branch)] Merge commit 'r15-10730-g33a0437ba5984e230488daf67207354172bed3ae' into redhat/gcc-15-branch   Jakub Jelinek
• [gcc r16-7011] c++: Fix ICE on namespace attributes [PR123684]   Jakub Jelinek
• [gcc r16-7012] c++: Fix ICE on decltype on non-local structured binding inside of a template [PR123667]   Jakub Jelinek
• [gcc r16-7013] c++: Fix wrong-code with overloaded comma and CPP_EMBED [PR123737]   Jakub Jelinek
• [gcc r16-7059] c++: Fix ICE in cxx_printable_name_internal [PR123578]   Jakub Jelinek
• [gcc r16-7060] c++: Don't error on non-consteval defaulted special members in consteval-only classes [PR123404]   Jakub Jelinek
• [gcc r16-7061] c++: Implement CWG3153 - Immediate-escalating defaulted comparison   Jakub Jelinek
• [gcc/redhat/heads/gcc-16-branch] (85 commits) Merge commit 'r16-7068-g0accf2b4dff933915ae75a154d268c79fc7   Jakub Jelinek
• [gcc(refs/vendors/redhat/heads/gcc-16-branch)] Merge commit 'r16-7068-g0accf2b4dff933915ae75a154d268c79fc7ea5b9' into redhat/gcc-16-branch   Jakub Jelinek
• [gcc r16-7101] free-lang-data: Remove C++ annotations [PR123837]   Jakub Jelinek
• [gcc r16-7102] c, c++: Use c*_build_qualified_type instead of build_qualified_type from within build_type_attribute   Jakub Jelinek
• [gcc r16-7103] c++: Implement part of CWG3044   Jakub Jelinek
• [gcc r16-7104] c++: Implement C++23 P2246R1 - Character encoding of diagnostic text   Jakub Jelinek
• [gcc r16-7132] c++: Implement CWG3131 - Value categories and types for the range in iterable expansion statements   Jakub Jelinek
• [gcc r16-7134] c++: Fix ICE in eval_annotations_of [PR123866]   Jakub Jelinek
• [gcc r16-7173] libcpp: Fix up comment handling in -fdirectives-only preprocessing [PR123273]   Jakub Jelinek
• [gcc r16-7174] openmp: Handle asm goto in diagnose_sb_2 [PR123876]   Jakub Jelinek
• [gcc r16-7182] fold-const: Fix implicit cast to nullptr_t typedef [PR123790]   Jakub Jelinek
• [gcc r16-7183] match.pd: Fix up __imag__ .MUL_OVERFLOW simplification [PR123864]   Jakub Jelinek
• [gcc r16-7184] libatomic: Don't install libatomic_asneeded.{so, a} if corresponding libatomic.{so, a} wasn't installe   Jakub Jelinek
• [gcc r16-7212] c++: Handle argument merging push_local_extern_decl_alias [PR123825]   Jakub Jelinek
• [gcc r16-6688] ipa: Add flag ref_by_asm to symtab_node   Michal Jires
• [gcc r16-6689] ipa: Analyze toplevel extended assembly   Michal Jires
• [gcc r16-6690] lto: Stream toplevel extended assembly   Michal Jires
• [gcc r16-6691] lto: Compute partition boundary with asm_nodes   Michal Jires
• [gcc r16-6692] lto: Add must_remain_in_tu flags to symtab_node   Michal Jires
• [gcc r16-6693] lto: Handle .local symbols in toplevel extended assembly   Michal Jires
• [gcc r16-6694] lto: Allow other partitionings for toplevel assembly   Michal Jires
• [gcc r16-6695] lto: Add toplevel simple assembly heuristics   Michal Jires
• [gcc r16-6696] lto: Fix SegFault in ICF caused by missing body   Michal Jires
• [gcc r16-7192] doc: Explain flto-toplevel-asm-heuristics   Michal Jires
• [gcc r16-6570] libstdc++: Use tree-dump-gimple in variant constant init tests.   Tomasz Kaminski
• [gcc r16-6710] libstdc++: Fix generate_cannonical test for 128bit floating points.   Tomasz Kaminski
• [gcc r16-6749] libstdc++: Fix handling iterators with proxy subscript in heap algorithms.   Tomasz Kaminski
• [gcc r16-6764] libstdc++: Add comment justifying separate proxy_random_access_iterator_wrapper.   Tomasz Kaminski
• [gcc r16-6895] libstdc++: Fix std::erase_if for std::string with -D_GLIBCXX_USE_CXX11_ABI=0.   Tomasz Kaminski
• [gcc r16-6898] libstdc++: Use overload operator<=> when provided in relational functors [PR114153]   Tomasz Kaminski
• [gcc r16-6992] libstdc++: Explicitly call _Mo_base() in _Cpy_base copy-constructor [PR123758]   Tomasz Kaminski
• [gcc r16-6495] MAINTAINERS: Swap emails   Filip Kastl
• [gcc r16-6648] Enable -fbit-tests and -fjump-tables at -Og [PR123212]   Filip Kastl
• [gcc r16-7044] doc: Document --param auto-profile-reorder-only   Filip Kastl
• [gcc r16-7146] pta: Fix comment of intra_create_variable_infos   Filip Kastl
• [gcc r16-6515] Generate a runtime error on recursive I/O, thread-safe   Thomas Koenig
• [gcc r16-6586] Fix compile failure on systems not supporting gthreads.   Thomas Koenig
• [gcc r16-6670] Fix broken bootstrap on FreeBSD.   Thomas Koenig
• [gcc r16-6763] Enable time profile function reordering with AutoFDO.   Prathamesh Kulkarni
• [gcc r16-6912] libgomp: Enforce tasks executed lexically after scheduled   Prathamesh Kulkarni
• [gcc r16-6913] libgomp: Ensure memory sync after performing tasks   Prathamesh Kulkarni
• [gcc r16-7175] gcov: Only consider pure locations in line mapping   Jorgen Kvalsvik
• [gcc r16-7176] Update expected number of prime paths in test case   Jorgen Kvalsvik
• [gcc r16-7177] gcov-dump: Print start-position for conditions   Jorgen Kvalsvik
• [gcc r16-7178] gcc: -f*-coverage implies -ftest-coverage   Jorgen Kvalsvik
• [gcc r16-7179] gcov-dump: Print PATHS tag   Jorgen Kvalsvik
• [gcc r16-7180] Permit const counters in flush_on_edges [PR123855]   Jorgen Kvalsvik
• [gcc r15-10646] [RISC-V][PR target/121485] Fix mode on Zvkned lmul extending patterns   Jeff Law
• [gcc r16-6483] [PR target/123010] Simplify shift of sign extracted field to a sign extending shift   Jeff Law
• [gcc r16-6484] [PATCH v4] match.pd: (c?a:b) op d -> c ? (a op d):(b op d) [PR122608]   Jeff Law
• [gcc r16-6485] [PATCH v2]: pch, target: update host hooks for NetBSD and OpenBSD   Jeff Law
• [gcc r16-6487] [PATCH] c6x: fix the scheduling of floating-point multiplication instructions   Jeff Law
• [gcc r16-6488] [committed] Add Kazumoto & Oleg to contrib.texi   Jeff Law
• [gcc r16-6489] [PATCH] Add support for using picolibc   Jeff Law
• [gcc r16-6490] Partially revert patch that made VXRM a global register on RISC-V   Jeff Law
• [gcc r16-6502] [PATCH v1 1/2] RISC-V: Fix incorrect combine pattern for any_extend [PR123317]   Jeff Law
• [gcc r16-6503] [PATCH v1 2/2] RISC-V: Add run test case for vwadd/vwsub wx mis combine [PR123317]   Jeff Law
• [gcc r16-6504] [RISC-V] Restore inline expansion of block moves on RISC-V in some cases   Jeff Law
• [gcc r16-6527] [PR target/123269] Adjust predcomm testcases to avoid vectorization   Jeff Law
• [gcc r16-6549] [PATCH v3] match.pd: popcount(X & -X) -> -X != 0 [PR102486]   Jeff Law
• [gcc r16-6557] [committed] [PR target/123403] Fix base register and offsets for v850 libgcc   Jeff Law
• [gcc r16-6559] [committed] Use compact form to update stack pointer in libgcc   Jeff Law
• [gcc r16-6561] [PATCH] ia64: properly include libunwind support during configuration   Jeff Law
• [gcc r16-6562] [PATCH 1/2] ia64: Fix zero_call_used_regs for PRs [PR121535]   Jeff Law
• [gcc r16-6580] Re: [PATCH] match: Check else value compatibility [PR123268].   Jeff Law
• [gcc r16-6581] [PATCH 2/2] ia64: Expand MAX_VECT_LEN to 16   Jeff Law
• [gcc r16-6582] [PATCH v6 1/1] Add --with-multi-buildlist configure option   Jeff Law
• [gcc r16-6591] [RISC-V] Clamp long reservations to 7c   Jeff Law
• [gcc r16-6592] [PR target/121778] Improving rotation detection   Jeff Law
• [gcc r16-6683] Fix regression on mcore-elf port after recent switch conversion change   Jeff Law
• [gcc r16-6744] [PR tree-optimization/123530] Fix ICE in recently added match.pd pattern   Jeff Law
• [gcc r16-6811] Fix RISC-V test after recent vectorizer changes   Jeff Law
• [gcc/riscv/heads/gcc-15-with-riscv-opts] (763 commits) doc, riscv: Clean up documentation of RISC-V options [PR122   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] RISC-V: Do not free a riscv_arch_string when handling target-arch attribute   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] [RISC-V] Tune for removal unnecessary sext in builtin overflows [PR108016]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] riscv: Add support for riscv*-gnu (GNU/Hurd on RISC-V)   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Fix missed bext discovery   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/118410] Improve code generation for some logical ops   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/119865] Don't free ggc allocated memory   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [riscv] vec_dup immediate constants in pred_broadcast expand [PR118182]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] [RISC-V]Support -mcpu for Xuantie cpu   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] RISC-V: Imply C from Zca whenever possible [PR119122]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Extract vec_duplicate for expand_const_vector [NFC]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Extract vec_series for expand_const_vector [NFC]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Extract vector duplicate for expand_const_vector [NFC]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Extract vector stepped for expand_const_vector [NFC]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix register move cost for SIBCALL_REGS/JALR_REGS   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add intrinsics support for SiFive Xsfvcp extensions.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add intrinsics testcases for SiFive Xsfvcp extensions.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix missing implied Zicsr from Zve32x   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Allow different dynamic floating point mode to be merged [PR119832]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Remove unnecessary frm restore volatile define_insn   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [to-be-committed][RISC-V] Adjust testcases and finish register move costing fix   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] RISC-V: Implment H modifier for printing the next register name   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Adjust rvv tests after recent jump threading change   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [V2][RISC-V] Trivial permutation constant derivation   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Apply clang-format to genrvv-type-indexer.cc [NFC]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix gcc.target/riscv/predef-19.c [PR120054]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add new option --param=gpr2vr-cost= for rvv insn   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add gr2vr cost helper function   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vadd.vv to vadd.vx on GR2VR cost   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcases for vec_duplicate + vadd.vv combine when GR2VR cost 0   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcases for vec_duplicate + vadd.vv combine when GR2VR cost 1   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcases for vec_duplicate + vadd.vv combine when GR2VR cost 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR middle-end/114512] Recognize more bext idioms for RISC-V   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] RISC-V: Recognized svadu and svade extension   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] RISC-V: Minimal support for sdtrig and ssstrict extensions.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Avoid unnecessary andi with -1 argument   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] RISC-V: Minimal support for zama16b extension.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/120137][PR target/120154] Don't create out-of-range permutation constants   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Separate the test running of rvv vx_vf   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Rename VX_BINARY test helper to VX_BINARY_CASE_0   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcases for vec_duplicate + vadd.vv combine case 1 with GR2VR cost 0   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcases for vec_duplicate + vadd.vv combine case 1 with GR2VR cost 1   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcases for vec_duplicate + vadd.vv combine case 1 with GR2VR cost 2   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH v2] RISC-V: Use vclmul for CRC expansion if available   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [V2][RISC-V] Synthesize more efficient IOR/XOR sequences   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Support RISC-V Profiles 20/22.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Support RISC-V Profiles 23.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] testsuite: Fix RISC-V arch-52.c format issue.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Support for zilsd and zclsd extensions.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Minimal support for ssnpm, smnpm and smmpm extensions.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcases for scalar unsigned integer SAT_ADD form 7   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcases for vector unsigned integer SAT_ADD form 7   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Introduce riscv-ext*.def to define extensions   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Use riscv-ext.def to generate target options and variables   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Generate extension table in documentation from riscv-ext.def   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Adjust riscv_can_inline_p   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Introduce riscv_ext_info_t to hold extension metadata   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Drop riscv_implied_info and riscv_combine_info in favor of riscv_ext_info_t data   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Drop riscv_ext_version_table in favor of riscv_ext_info_t data   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Drop riscv_ext_flag_table in favor of riscv_ext_info_t data   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Regen riscv-ext.opt.urls   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Drop duplicate build rule for riscv-ext.opt [NFC]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add augmented hypervisor series extensions.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix uninit riscv_subset_list::m_allow_adding_dup issue   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/120223] Don't use bset/binv for XTHEADBS   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vsub.vv to vsub.vx on GR2VR cost   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Rename vx_vadd-* testcase to vx-* for all vx combine [NFC]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Adjust vx combine test case to avoid name conflict   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vsub.vv combine case 0 with GR2VR cost 0   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vsub.vv combine case 0 with GR2VR cost 1   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vsub.vv combine case 0 with GR2VR cost 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vsub.vv combine case 1 with GR2VR cost 0   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vsub.vv combine case 1 with GR2VR cost 1   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vsub.vv combine case 1 with GR2VR cost 2   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Reuse test name for vx combine test data [NFC]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Make end_sequence return the insn sequence   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Partial cherry-pick of 4dd13988c93c24ba3605f4b9cafc97515c34f2ac, just the RISC-V backend bits.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Avoid scalar unsigned SAT_ADD test data duplication   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Since the loop increment i++ is unreachable, the loop body will never execute more than once   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Avoid setting output object more than once in IOR/XOR synthesis   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Fix ICE due to bogus use of gen_rtvec   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add new operand constraint: cR   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Support Zilsd code gen   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Rename conflicting variables in gen-riscv-ext-texi.cc   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix the warning of temporary object dangling references.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Fix false positive from Wuninitialized   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [committed][RISC-V][PR target/120333] Remove bogus bext pattern   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vrsub.vv to vrsub.vx on GR2VR cost   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vrsub.vv combine case 0 with GR2VR cost 0   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vrsub.vv combine case 0 with GR2VR cost 1   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vrsub.vv combine case 0 with GR2VR cost 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vrsub.vv combine case 1 with GR2VR cost 0   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vrsub.vv combine case 1 with GR2VR cost 1   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vrsub.vv combine case 1 with GR2VR cost 2   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Tweak the asm check test of vx combine on GR2VR cost [NFC]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Avoid multiple assignments to output object   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH v2 1/2] The following changes enable P8700 processor for RISCV and P8700 is a high-performanc   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH v2 2/2] MIPS p8700 doesn't have vector extension and added the dummies reservation for the sa   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Infrastructure of synthesizing logical AND with constant   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: RISC-V: Combine vec_duplicate + vand.vv to vand.vx on GR2VR cost   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vand.vv combine case 0 with GR2VR cost 0, 2 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vand.vv combine case 1 with GR2VR cost 0, 1 and 2   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/120368] Fix 32bit shift on rv64   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Improve (x << C1) + C2 split code   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Clear high or low bits using shift pairs   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] testsuite: RISC-V: Update the cset-sext-sfb/zba-slliuw test optimization level.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH][RISC-V][PR target/70557] Improve storing 0 to memory on rv32   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Clear both upper and lower bits using 3 shifts   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix some dynamic LMUL costing.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Default-initialize variable.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add autovec mode param.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Support CPUs in -march.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vor.vv to vor.vx on GR2VR cost   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vor.vv combine case 0 with GR2VR cost 0, 2 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vor.vv combine case 1 with GR2VR cost 0, 1 and 2   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] shift+and+shift for logical and synthesis   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V:Add testcases for signed .SAT_ADD IMM form 1 with IMM = -1.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcases for signed vector SAT_ADD IMM form 1   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vxor.vv to vxor.vx on GR2VR cost   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vxor.vv combine case 0 with GR2VR cost 0, 2 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vxor.vv combine case 1 with GR2VR cost 0, 1 and 2   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Add andi+bclr synthesis   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Leverage vaadd.vv for signed standard name avg_floor   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Reconcile the existing test for avg_floor   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test cases for avg_floor vaadd implementation   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Avoid division by zero in check_builtin_call [PR120436].   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vmul.vv to vmul.vx on GR2VR cost   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vmul.vv combine case 0 with GR2VR cost 0, 2 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vmul.vv combine case 1 with GR2VR cost 0, 1 and 2   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add minimal support of double trap extension 1.0   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Leverage vaadd.vv for signed standard name avg_ceil   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Reconcile the existing test for avg_ceil   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test cases for avg_ceil vaadd implementation   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix line too long format issue for autovect.md [NFC]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] testsuite: RISC-V: Fix the typo in param-autovec-mode.c   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Implement full-featured iterator for riscv_subset_list [NFC]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Adjust build rule for gen-riscv-ext-opt and gen-riscv-ext-texi   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] RISC-V: Add smcntrpmf extension.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add pattern for vector-scalar multiply-add/sub [PR119100]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Use helper function to get FPR to VR move cost   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vidv.vv to vdiv.vx on GR2VR cost   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vdiv.vv combine case 0 with GR2VR cost 0, 2 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vdiv.vv combine case 1 with GR2VR cost 0, 1 and 2   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Reconcile the existing test for vdiv.vx combine   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add Shlcofideleg extension.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Leverage get_vector_binary_rtx_cost to avoid code dup [NFC]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH v2] RISC-V: Add svbare extension.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] RISC-V: Imply zicsr for svade and svadu extensions.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Update extension defination.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Support Sm/scsrind extensions.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Support Smrnmi extension.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Support Ssccptr extension.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Support Sscounterenw extension.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Support Sstvala extension.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Support Sstvecd extension.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Support Ssu64xl extension.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Improve sequences to generate -1, 1 in some cases.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix ICE for gcc.dg/graphite/pr33576.c with rv32gcv   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Don't use structured binding in riscv-common.cc   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Improve signed division by 2^n   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Support -mcpu for XiangShan Kunminghu cpu.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vidvu.vv to vdivu.vx on GR2VR cost   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vdivu.vv combine case 0 with GR2VR cost 0, 2 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vdivu.vv combine case 1 with GR2VR cost 0, 1 and 2   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Reconcile the existing test for vdivu.vx combine   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [to-be-committed][RISC-V] Handle 32bit operands in condition for conditional moves   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Handle 32bit operands in condition for conditional moves   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: frm/mode-switch: remove TARGET_MODE_CONFLUENCE   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: frm/mode-switch: remove dubious frm edge insertion before call_insn   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: frm/mode-switch: Reduce FRM restores on DYN transition [PR119164]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: frm/mode-switch: robustify call_insn backtracking [PR120203]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vrem.vv to vrem.vx on GR2VR cost   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Reconcile the existing test for vrem.vx combine   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vrem.vv combine case 0 with GR2VR cost 0, 2 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vrem.vv combine case 1 with GR2VR cost 0, 1 and 2   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Enable more if-conversion on RISC-V   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vremu.vv to vremu.vx on GR2VR cost   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Reconcile the existing test for vremu.vx combine   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vremu.vv combine case 0 with GR2VR cost 0, 2 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vremu.vv combine case 1 with GR2VR cost 0, 1 and 2   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Regen riscv-ext.texi [NFC]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: testsuite: fix an obvious build error   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add patterns for vector-scalar negate-(multiply-add/sub) [PR119100]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Prevent speculative vsetvl insn scheduling   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vmax.vv to vmax.vx on GR2VR cost   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_dup + vmax.vv combine case 0 with max func 0 and GR2VR cost 0, 2 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_dup + vmax.vv combine case 0 with max func 1 and GR2VR cost 0, 2 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_dup + vmax.vv combine case 1 with max func 0 and GR2VR cost 0, 1 and 2   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_dup + vmax.vv combine case 1 with max func 1 and GR2VR cost 0, 1 and 2   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vmaxu.vv to vmaxu.vx on GR2VR cost   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vmaxu.vv combine case 0 with GR2VR cost 0, 2 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vmaxu.vv combine case 1 with GR2VR cost 0, 1 and 2   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Update Profiles string in RV23.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Refine VX combine test case 0 to avoid code duplication   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add -fno-pie flags to testcases   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH v1] RISC-V: Use scratch reg for loop control   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vmin.vv to vmin.vx on GR2VR cost   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vmin.vv combine case 0 with GR2VR cost 0, 2 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vmin.vv combine case 1 with GR2VR cost 0, 1 and 2   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Adding cost model for zilsd   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Use riscv_2x_xlen_mode_p [NFC]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add generic tune as default.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vminu.vv to vminu.vx on GR2VR cost   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vminu.vv combine case 0 with GR2VR cost 0, 2 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vminu.vv combine case 1 with GR2VR cost 0, 1 and 2   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] RISC-V: Use builtin clz/ctz when count_leading_zeros and count_trailing_zeros is used   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Force several tests to use rocket tuning   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix ICE for expand_select_vldi [PR120652]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/118241] Fix data prefetch predicate/constraint for RISC-V   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vsaddu.vv to vsaddu.vx on GR2VR cost   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vsaddu.vv combine case 0 with GR2VR cost 0, 2 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vsaddu.vv combine case 1 with GR2VR cost 0, 1 and 2   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add patterns for vector-scalar multiply-(subtract-)accumulate [PR119100]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add Profiles RVA/B23S64 support.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add comment and reorder the the include files in riscv.md [NFC]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix build issue   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: update prepare_ternary_operands to handle vector-scalar case [PR120828]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/119971] Avoid losing shift count masking   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add pipeline-checker script   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Refactor the function bitmap_union_of_preds_with_entry   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Vector-scalar negate-multiply-(subtract-)accumulate [PR119100]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Adding B ext, fp16 and missing scalar instruction type for sifive-7 pipeline model [PR120659   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Primary vector pipeline model for sifive 7 series   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Ignore -Oz for most rvv testcase [NFC]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vssubu.vv to vssubu.vx on GR2VR cost   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Reconcile the existing test due to cost model change   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vssubu.vv combine case 0 with GR2VR cost 0, 2 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vssubu.vv combine case 1 with GR2VR cost 0, 1 and 2   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] [RISC-V] Fix shift type for RVV interleaved stepped patterns [PR120356]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: testsuite: Skip tests providing -march/-mcpu for ILP32E/ILP64E ABIs   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/118886] Refine when two insns are signaled as fusion candidates   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Refactor record_function_versions.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcases for signed scalar SAT_ADD IMM form 2   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Add basic instrumentation to fusion detection   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vsadd.vv to vsadd.vx on GR2VR cost   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vsadd.vv combine case 0 with GR2VR cost 0, 2 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vsadd.vv combine case 1 with GR2VR cost 0, 1 and 2   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Implement unsigned scalar SAT_MUL from uint128_t   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test cases for unsigned scalar SAT_MUL from uint128_t   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [committed][RISC-V] Fix testsuite fallout from check-function-bodies change   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Ignore non-types in builtin function hash.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Do not use vsetivli for THeadVector.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Disable uint128_t testcase of SAT_MUL when rv32   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/120642] Avoid propagating constant AVL for theadvector   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] RISC-V: Adjust testdata for unsigned vector SAT_SUB   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] RISC-V: Enable zvfh for vector-scalar half-float run tests   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vssub.vv to vssub.vx on GR2VR cost   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vssub.vv combine case 0 with GR2VR cost 0, 2 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vssub.vv combine case 1 with GR2VR cost 0, 1 and 2   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISCV: Remove the v extension requirement for sat scalar run test   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Detect new fusions for RISC-V   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Make zero-stride load broadcast a tunable.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcases for unsigned vector SAT_SUB form 11 and form 12   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH v2] RISC-V: Vector-scalar widening multiply-(subtract-)accumulate [PR119100]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcase for rv32 SAT_MUL from uint64   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH v5] RISC-V: Mips P8700 Conditional Move Support.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Support RVVDImode for avg3_floor auto vect   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Refine the scalar SAT_* test cases   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix vsetvl merge rule.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Support RVVDImode for avg3_ceil auto vect   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] RISC-V: prevent NULL_RTX dereference in riscv_macro_fusion_pair_p ()   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] RISC-V: Vector-scalar widening negate-multiply-(subtract-)accumulate [PR119100]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add ashiftrt operand 2 for vector avg_floor and avg_ceil   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Refine the test case for vector avg_floor and avg_ceil [NFC]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcase for unsigned scalar SAT_ADD form 8 and form 9   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vaaddu.vv to vaaddu.vx on GR2VR cost for HI, QI and SI mode   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vaaddu.vv combine case 0 with GR2VR cost 0, 2 and 15 for QI, HI   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vaaddu.vv combine case 1 with GR2VR cost 0, 1 and 2 for QI, HI   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Allow VLS DImode for sat_op vx DImode pattern   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vaaddu.vv combine for DImode   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Add missing insn types to xiangshan.md and mips-p8700.md   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Restrict generic-vector-ooo DFA   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Change bellow in comments to below   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: testsuite: Fix vx_vf_*run-1-f16.c run tests.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Rework broadcast handling [PR121073].   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Avoid vaaddu.vx combine pattern pollute VXRM csr   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test case for vx combine polluting VXRM   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] riscv: testsuite: Fix misalignment check.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add support for resumable non-maskable interrupt (RNMI) handlers   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Remove user-level interrupts   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Prepare dynamic LMUL heuristic for SLP.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: riscv-ext.def: Add allocated group IDs and group bit positions   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix another vf FP16 combine run test failures   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vaadd.vv to vaadd.vx on GR2VR cost   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vaadd.vv combine case 0 with GR2VR cost 0, 1 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vaadd.vv combine case 1 with GR2VR cost 0, 1 and 2   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test case for vaadd.vx combine polluting VXRM   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test cases for mul based unsigned scalar SAT_MUL   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Remove use of structured binding to fix compiler warning   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Generate -mcpu and -mtune options from riscv-cores.def.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcases for unsigned avg ceil vx combine.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Adding H to the canonical order [PR121312]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcases for signed avg ceil vx combine   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix scalar code-gen of unsigned SAT_MUL   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Support -march=unset   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Read extension data from riscv-ext*.def for arch-canonicalize   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Refactor the vec_duplicate cost on gpr/fpr2vr-cost param   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcase for scalar unsigned SAT_MUL form 2   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Don't run tests requiring "B" on designs without "B"   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Improve initial code generation for addsi/adddi   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Expand const_vector with 2 elts per pattern.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vmerge.vv to vmerge.vx on GR2VR cost   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: RISC-V: Add test for vec_duplicate + vmerge.vvm combine with GR2VR cost 0, 1 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/121113] Handle HFmode in various insn reservations   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/121160] Avoid bogus force_reg call   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/121531] Cover missing insn types in p400 and p600 scheduler models   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PR target/119275][RISC-V] Avoid calling gen_lowpart in cases where it would ICE   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: MIPS prefetch extensions for MIPS RV64 P8700 and can be enabled with xmipscbop.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add missed DONE for vx combine pattern [NFC]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Update the comments of vx combine [NFC]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] RISC-V: Fix block matching in arch-canonicalize [PR121538]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] ira: tie output allocnos for fused instruction pairs   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] regrename: treat writes as reads for fused instruction pairs   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PR target/121213] Avoid unnecessary constant load in amoswap   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: testsuite: Fix DejaGnu support for riscv_zvfh   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcase for scalar unsigned SAT_MUL form 3   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PR rtl-optimization/120553] Improve selecting between constants based on sign bit test   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Fix invalid right shift count with recent ifcvt changes   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Replace deprecated FUNCTION_VALUE/LIBCALL_VALUE macros with target hooks   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vmacc.vv to vmacc.vx on GR2VR cost   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vmacc.vv signed combine with GR2VR cost 0, 1 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vmacc.vv unsigned combine with GR2VR cost 0, 1 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Fix RISC-V bootstrap   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] RISC-V: Add pattern for vector-scalar single-width floating-point multiply   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] RISC-V: Add pattern for reverse floating-point divide   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [committed] RISC-V Testsuite hygiene   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] More RISC-V testsuite hygiene   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: testsuite: Fix vf_vfmul and vf_vfrdiv   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Remove xfail marker on RISC-V test   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add pattern for vector-scalar floating-point min   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vnmsac.vv to vnmsac.vx on GR2VR cost   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vnmsac.vv signed combine with GR2VR cost 0, 1 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vnmsac.vv unsigned combine with GR2VR cost 0, 1 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add patterns for vector-scalar IEEE floating-point min   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test case for unsigned scalar SAT_MUL form 4   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Improve initial RTL generation for SImode adds on rv64   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Remove unused print_ext_doc_entry function [NFC]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Update Zba 'shNadd.uw' testcase.`   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add Zbb extension sext testcase.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix is_vlmax_len_p and use for strided ops.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/121213] Avoid unnecessary sign extension in amoswap sequence   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add pattern for vector-scalar floating-point max   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add basic XAndes vendor extension support.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add support for the XAndesperf ISA extension.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add support for the XAndesbfhcvt ISA extension.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix extension subset check in riscv_can_inline_p   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vmadd.vv signed combine with GR2VR cost 0, 1 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vmadd.vv unsigned combine with GR2VR cost 0, 1 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Adjust the vmacc.vx combine test cases   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Allow errors to be suppressed when parsing architectures   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vmadd.vv to vmadd.vx on GR2VR cost   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Adjust recently added test   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add tt-ascalon-d8 pipeline description   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add support for the XAndesvbfhcvt ISA extension.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add support for the XAndesvsintload ISA extension.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] gcc: introduce the dep_fusion pass   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] dep_fusion: Fix if target does not have macro fusion [PR121835]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vnmsub.vv to vnmsub.vx on GR2VR cost   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vnmsub.vv signed combine with GR2VR cost 0, 1 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vnmsub.vv unsigned combine with GR2VR cost 0, 1 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add support for the XAndesvpackfph ISA extension.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Fix ordering of pipeline models   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add support for the XAndesvdot ISA extension.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] gcc: introduce the dep_fusion pass   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add patterns for vector-scalar IEEE floating-point max   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add pattern for vector-scalar widening floating-point multiply   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add pattern for vector-scalar single-width floating-point add   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add pattern for vector-scalar single-width floating-point sub   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add pattern for vector-scalar single-width floating-point reverse sub   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Adjust tt-ascalon-d8 branch cost   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add pattern for vector-scalar widening floating-point add   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add pattern for vector-scalar single widening floating-point add   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add pattern for vector-scalar dual widening floating-point sub   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add pattern for vector-scalar single widening floating-point sub   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix typo in tt-ascalon-d8's pipeline description [PR121878]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix can_find_related_mode_p for VLS types   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] ifcvt: Clarify if_info.original_cost.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add min/max patterns for ifcvt.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Suppress cross CC sibcall optimization from vector   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Adjust ABI specification in recently added Andes tests   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Match: Support SAT_TRUNC variant NARROW_CLIP   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Support vnclip idiom testcase [PR120378]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix vendor intrinsic tests for disabled multilib configurations   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Widening-Mul: Refine build_and_insert_cast when rhs is cast   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Imply zicsr for sdtrig and ssstrict extensions.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Configure Profiles definitions in the definition file.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Allow profiles input in '--with-arch' option.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vwaddu.vv to vwaddu.vx on GR2VR cost   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vwaddu.vv signed combine with GR2VR cost 0, 1 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vwsubu.vv signed combine with GR2VR cost 0, 1 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vwmulu.vv signed combine with GR2VR cost 0, 1 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PR tree-optimization/58727] Don't over-simplify constants`   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test case of unsigned scalar SAT_MUL form 5 for widen-mul   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Correct lmul estimation   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Optimize clear-lowest-set-bit sequence when ctz is nearby   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Only Save/Restore required registers for ILP32E/LP64E   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Improve slide patterns recognition   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/121983] Fix unprotected REGNO invocation   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add missing define_insn_reservation to tt-ascalon-d8.md [PR121982]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test case of unsigned scalar SAT_MUL form 5 for mul   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH][PR target/121778] RISC-V: Improve rotation detection for RISC-V   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/122106] Add missing predicate on crc expanders   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/122051] Fix pmode_reg_or_uimm5_operand for thead vector   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR rtl-optimization/121937] Don't call neg_poly_int_rtx with a vector mode   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PR target/118945][PATCH v3] RISC-V: Add 'prefer_agnostic' tune parameter for vector policies   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/122147] Avoid creating (subreg (mem)) in RISC-V port   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH v2] RISC-V: Fix type of CFA during stack probe [PR122114]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Fixup merge conflict   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] ISC-V: Add test for vec_duplicate + vwaddu.wv signed combine with GR2VR cost 0, 1 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vwaddu.wv to vwaddu.wx on GR2VR cost   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] RISC-V: Fix slide pattern recognition [PR122124]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Allow VLS types using up to LMUL 8   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vwsubu.wv to vwsubu.wx on GR2VR cost   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vwsubu.wv combine with GR2VR cost 0, 1 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Improve subword atomic patterns in sync.md   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PR target/119587] RISC-V: xtheadmemidx: Split slli.uw pattern   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/120811] Improving address reloads in LRA   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH v3] RISC-V: Implement RISC-V profile macro support   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix incorrect op of vwaddu/vwsubu wx combine   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcase for unsigned scalar SAT_MUL form 6   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Fix minor testsuite scan failures for RISC-V   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Fix minor RISC-V testsuite failure   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH v2] RISC-V: Fix moving data from V_REGS to GR_REGS by scalar move.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Increase NUM_ABI_IDS to support RISC-V VLS calling convention variants   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/64345][PR tree-optimization/80770] Improve simple bit extractions on RISC-V   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Implement standard fixed-length vector calling convention variant   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testsuite for fixed-length vector calling convention variant [Part 1]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testsuite for fixed-length vector calling convention variant [Part 2]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Skip riscv/rvv/xtheadvector/pr116593.C if not hostedlib   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Clean up build warnings for VLS calling convention   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH v2] RISC-V: avlprop: Scale AVL by subreg ratio [PR122445].   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] niter: Use ranger to query ctz range.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Reorder ready queue slightly to avoid unnecessary vsetvl instructions   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][SH][PR rtl-optimization/67731] Improve logical IOR of single bit bitfields   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] gcc: Drop junk vim backup file   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Expose sign extension for 32 bit rotates by constant values on rv64   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR tree-optimization/52345] Optimize testing multiple booleans   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix the ABI of empty unions and zero length array in struct   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PR rtl-optimization/122536] Fix guard against variable bit extracts in RTL simplifier   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: testsuite: Fix pr119115.c.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR 121136] Improve various tests which only need to examine upper bits in a GPR   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Ignore useless zero-initialization in conditional move sequence costing   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: RISC-V: Combine vec_duplicate + vwmaccu.vv to vwmaccu.vx on GR2VR cost   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vwmaccu.vv combine with GR2VR cost 0, 1 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vsext.vf2 and vsll.vi to vwsll.vi on ZVBB   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Add testcase for shifted truthvalue   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vmseq.vv combine case 0 with GR2VR cost 0, 1 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vmseq.vv combine case 1 with GR2VR cost 0, 1 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Simplify riscv_extend_to_xmode_reg   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Improve detection of packw   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add Andes 25 series pipeline description.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Handle shift-pairs in ext-dce for targets without zero/sign extension insns   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add missing member for andes_25_tune_info   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Drop scan-tests of marginal value   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Avoid most calls to gen_extend_insn   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vmsne.vv combine case 0 with GR2VR cost 0, 1 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vmsne.vv combine case 1 with GR2VR cost 0, 1 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PR rtl-optimization/122575] Fix mode on optimized IOR comparison   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Remove gather scale and offset handling.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Add cpu and tuning structures for spacemit-x60 design   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add flag to adjust mem inlining threshold   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Fix trivial bootstrap failure on RISC-V   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add RTL pass to combine cm.popret with zero return value   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PR118358, LRA]: Decrease pressure after issuing input reload insns   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PR 122701] Emit fresh reg->reg copy rather than modifying existing insnO   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PR rtl-optimization/122782] Fix out of range shift causing bootstrap failure with ubsan   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add BF VLS modes and document iterators.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcase for unsigned scalar SAT_MUL form 7   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Revert "[PATCH v3] RISC-V: Implement RISC-V profile macro support"   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix one typo result in pr121959-run-1 run failure   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add Andes 23 series pipeline description.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add Andes 45 series pipeline description.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Run gen-riscv-ext-opt to regenerate riscv-ext.opt [NFC]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add SpacemiT extension xsmtvdot   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Support --with-cpu   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Emit \n\t at the end of instruction instead of ;   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] riscv: RISCV backend, meet C++20   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH][PR target/122942] RISC-V: Add zifencei extension to the rva23s64 and rvb23s64 profiles [PR12   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Remove unused placeholder_p parameter from add_function   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vmsltu.vv to vmsltu.vx on GR2VR cost   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vmsltu.vv combine with GR2VR cost 0, 1 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [riscv] avoid auipc overflow with large offsets [PR91420]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Implement mask reduction.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Pragma target [PR115325].   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] middle-end: Add new parameter to scale scalar loop costing in vectorizer   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] vect: Add vect-scalar-cost-multiplier for SLP.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: -mmax-vectorization.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Regenerate opt urls.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vmslt.vv to vmslt.vx on GR2VR cost   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vmslt.vv combine with GR2VR cost 0, 1 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] RISC-V: Rename UPPERCAE_NAME to UPPERCASE_NAME   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Fix various RISC-V testsuite regressions after volatile patch   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Change gather/scatter iterators.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Rename vector-mode related functions.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add VLS modes to autovec iterators.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Generic vec_extract via subreg.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Testsuite fixes.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix overflow check in interleave pattern [PR122970].   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][V2] Improve spill code for RVV slightly to fix regressions after recent changes   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] ifcvt: cond zero arith: opencode helper noce_bbs_ok_for_cond_zero_arith [NFC]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] ifcvt: cond zero arith: factor out common noce_emit_czero emit calls [NFC]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] ifcvt: cond zero arith: re-expand output pattern [NFC]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] ifcvt: cond zero arith: elide short forward branch for signed GE 0 comparison [PR122769]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] ifcvt: cond zero arith: handle subreg for shift count   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][V2] Improve spill code for RVV slightly to fix regressions after recent changes   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] ifcvt: Fix noce_try_cond_zero_arith after get_base_reg change [PR123267]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PATCH] Adjust clmul latency in Spacemit X60 scheduler model   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/123278] Handle BF/HF modes in Andes 45 series pipeline description   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [committed][RISC-V][PR target/123274] Add missing condition in usmul<mode>3 pattern   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] ifcvt: Only allow scalar integral modes for noce_try_cond_zero_arith [PR123276]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] ifcvt: Move noce_try_cond_zero_arith last   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vmsleu.vv to vmsleu.vx on GR2VR cost   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vmsleu.vv combine with GR2VR cost 0, 1 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] doc, riscv: Clean up RISC-V extensions documentation   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] doc: make regenerate-opt-urls   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/123283] Wrap naked REG operands with a USE.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Revert "ifcvt: Move noce_try_cond_zero_arith last"   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] simplify-rtx: Fix up (ne (ior (ne x 0) y) 0) simplification [PR123114]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] ifcvt: cleanup if_info->cond usage in noce_try_cond_zero_arith   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] ifcvt: Handle lowpart subregs if noce_emit_cmove fails in noce_try_cond_zero_arith [PR123308]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] ifcvt: Allow non-comparisons against 0 in noce_try_cond_zero_arith   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/123318] Use a Pmode temporary for output of auipc   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/121485] Fix mode on Zvkned lmul extending patterns   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PR target/123010] Simplify shift of sign extracted field to a sign extending shift   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Partially revert patch that made VXRM a global register on RISC-V   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Vect: Adjust depth_limit of vec_slp_has_scalar_use from 2 to 3   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Adjust the asm check of vx_vf due to middle-end change   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH v1 1/2] RISC-V: Fix incorrect combine pattern for any_extend [PR123317]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH v1 2/2] RISC-V: Add run test case for vwadd/vwsub wx mis combine [PR123317]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Restore inline expansion of block moves on RISC-V in some cases   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH v3] match.pd: popcount(X & -X) -> -X != 0 [PR102486]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: -mrvv-max-lmul=conv-dynamic [PR122846].   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Clamp long reservations to 7c   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] ifcvt: Reject inner floating modes of a subreg for noce_try_cond_zero_arith [PR123491]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Update tt-ascalon-d8's extension list [PR123492]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] forwprop: Use ssizetype for mask [PR123414].   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add support for _BitInt [PR117581]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] VN: Fix VN ICE for large _BitInt types   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] rtlanal: Determine nonzero bits of popcount from operand [PR123501].   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] if-conv: Prevent vector types in scalar cond reduction [PR123301].   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] forwprop: Fix type mismatch in vec constructor [PR123525].   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] ifcvt: Improve `cmp?a&b:a` to try with -1 [PR123312]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] match: Add simplification of `(a*zero_one_valued_p) & b` if `a & b` simplifies [PR119402]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Enable the ZD constraint only when xmipscbop is enabled [PR123092]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Fix RISC-V test after recent vectorizer changes   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PR123092, LRA]: Reprocess insn after equivalence substitution   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PR target/121778] Improving rotation detection   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] forwprop: Check type conversion in pack/unpack [PR123117].   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] forwprop: allow subvectors in simplify_vector_constructor ()   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] forwprop: Allow nop conversions for vector constructor.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] vect: Make SELECT_VL a convert optab.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] doc, riscv: Clean up documentation of RISC-V options [PR122243]   Jeff Law
• [gcc r16-6901] [PR target/113666] Simplify VEC_EXTRACT from a uniform vector   Jeff Law
• [gcc r15-10707] [PR123092, LRA]: Reprocess insn after equivalence substitution   Jeff Law
• [gcc r16-6907] [RISC-V][PR rtl-optimization/121787] Work around bad cfglayout interaction with asm goto   Jeff Law
• [gcc r16-6939] [RISC-V][PR target/123626] Fix VXRM state after calls   Jeff Law
• [gcc r16-6940] [PR rtl-optimization/123380] Avoid creating bogus SUBREG in combine   Jeff Law
• [gcc] Created branch 'law/heads/pr80770' in namespace 'refs/users'   Jeff Law
• [gcc(refs/users/law/heads/pr80770)] zero-extension patches for pr80770.   Jeff Law
• [gcc(refs/users/law/heads/pr80770)] Shreya's define_split for pr80770   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PR target/113666] Simplify VEC_EXTRACT from a uniform vector   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR rtl-optimization/121787] Work around bad cfglayout interaction with asm goto   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/123626] Fix VXRM state after calls   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PR rtl-optimization/123380] Avoid creating bogus SUBREG in combine   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Correct builtin registration order [PR123279].   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] forwprop: More nop-conversion handling [PR123731].   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add zvfbfmin to tt-ascalon-d8's extension list [PR123492]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix indexed store output template [PR123780].   Jeff Law
• [gcc/riscv/heads/gcc-15-with-riscv-opts] (129 commits) RISC-V: Fix indexed store output template [PR123780].   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] tree-optimization/122502 - avoid folding during imm use walk with active ranger   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Reorder ready queue slightly to avoid unnecessary vsetvl instructions   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][SH][PR rtl-optimization/67731] Improve logical IOR of single bit bitfields   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] gcc: Drop junk vim backup file   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Expose sign extension for 32 bit rotates by constant values on rv64   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR tree-optimization/52345] Optimize testing multiple booleans   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix the ABI of empty unions and zero length array in struct   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PR rtl-optimization/122536] Fix guard against variable bit extracts in RTL simplifier   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: testsuite: Fix pr119115.c.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR 121136] Improve various tests which only need to examine upper bits in a GPR   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Ignore useless zero-initialization in conditional move sequence costing   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: RISC-V: Combine vec_duplicate + vwmaccu.vv to vwmaccu.vx on GR2VR cost   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vwmaccu.vv combine with GR2VR cost 0, 1 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vsext.vf2 and vsll.vi to vwsll.vi on ZVBB   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Add testcase for shifted truthvalue   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vmseq.vv combine case 0 with GR2VR cost 0, 1 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vmseq.vv combine case 1 with GR2VR cost 0, 1 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Simplify riscv_extend_to_xmode_reg   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Improve detection of packw   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add Andes 25 series pipeline description.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Handle shift-pairs in ext-dce for targets without zero/sign extension insns   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add missing member for andes_25_tune_info   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Drop scan-tests of marginal value   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Avoid most calls to gen_extend_insn   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vmsne.vv combine case 0 with GR2VR cost 0, 1 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vmsne.vv combine case 1 with GR2VR cost 0, 1 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PR rtl-optimization/122575] Fix mode on optimized IOR comparison   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Remove gather scale and offset handling.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Add cpu and tuning structures for spacemit-x60 design   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add flag to adjust mem inlining threshold   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Fix trivial bootstrap failure on RISC-V   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add RTL pass to combine cm.popret with zero return value   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PR118358, LRA]: Decrease pressure after issuing input reload insns   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PR 122701] Emit fresh reg->reg copy rather than modifying existing insnO   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PR rtl-optimization/122782] Fix out of range shift causing bootstrap failure with ubsan   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add BF VLS modes and document iterators.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcase for unsigned scalar SAT_MUL form 7   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Revert "[PATCH v3] RISC-V: Implement RISC-V profile macro support"   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix one typo result in pr121959-run-1 run failure   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add Andes 23 series pipeline description.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add Andes 45 series pipeline description.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Run gen-riscv-ext-opt to regenerate riscv-ext.opt [NFC]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add SpacemiT extension xsmtvdot   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Support --with-cpu   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Emit \n\t at the end of instruction instead of ;   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] riscv: RISCV backend, meet C++20   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH][PR target/122942] RISC-V: Add zifencei extension to the rva23s64 and rvb23s64 profiles [PR12   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Remove unused placeholder_p parameter from add_function   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vmsltu.vv to vmsltu.vx on GR2VR cost   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vmsltu.vv combine with GR2VR cost 0, 1 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [riscv] avoid auipc overflow with large offsets [PR91420]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Implement mask reduction.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Pragma target [PR115325].   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] middle-end: Add new parameter to scale scalar loop costing in vectorizer   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] vect: Add vect-scalar-cost-multiplier for SLP.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: -mmax-vectorization.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Regenerate opt urls.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vmslt.vv to vmslt.vx on GR2VR cost   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vmslt.vv combine with GR2VR cost 0, 1 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] RISC-V: Rename UPPERCAE_NAME to UPPERCASE_NAME   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Fix various RISC-V testsuite regressions after volatile patch   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Change gather/scatter iterators.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Rename vector-mode related functions.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add VLS modes to autovec iterators.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Generic vec_extract via subreg.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Testsuite fixes.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix overflow check in interleave pattern [PR122970].   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][V2] Improve spill code for RVV slightly to fix regressions after recent changes   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] ifcvt: cond zero arith: opencode helper noce_bbs_ok_for_cond_zero_arith [NFC]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] ifcvt: cond zero arith: factor out common noce_emit_czero emit calls [NFC]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] ifcvt: cond zero arith: re-expand output pattern [NFC]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] ifcvt: cond zero arith: elide short forward branch for signed GE 0 comparison [PR122769]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] ifcvt: cond zero arith: handle subreg for shift count   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][V2] Improve spill code for RVV slightly to fix regressions after recent changes   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] ifcvt: Fix noce_try_cond_zero_arith after get_base_reg change [PR123267]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PATCH] Adjust clmul latency in Spacemit X60 scheduler model   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/123278] Handle BF/HF modes in Andes 45 series pipeline description   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [committed][RISC-V][PR target/123274] Add missing condition in usmul<mode>3 pattern   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] ifcvt: Only allow scalar integral modes for noce_try_cond_zero_arith [PR123276]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] ifcvt: Move noce_try_cond_zero_arith last   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vmsleu.vv to vmsleu.vx on GR2VR cost   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vmsleu.vv combine with GR2VR cost 0, 1 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] doc, riscv: Clean up RISC-V extensions documentation   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] doc: make regenerate-opt-urls   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/123283] Wrap naked REG operands with a USE.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Revert "ifcvt: Move noce_try_cond_zero_arith last"   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] simplify-rtx: Fix up (ne (ior (ne x 0) y) 0) simplification [PR123114]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] ifcvt: cleanup if_info->cond usage in noce_try_cond_zero_arith   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] ifcvt: Handle lowpart subregs if noce_emit_cmove fails in noce_try_cond_zero_arith [PR123308]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] ifcvt: Allow non-comparisons against 0 in noce_try_cond_zero_arith   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/123318] Use a Pmode temporary for output of auipc   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/121485] Fix mode on Zvkned lmul extending patterns   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PR target/123010] Simplify shift of sign extracted field to a sign extending shift   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Partially revert patch that made VXRM a global register on RISC-V   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Vect: Adjust depth_limit of vec_slp_has_scalar_use from 2 to 3   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Adjust the asm check of vx_vf due to middle-end change   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH v1 1/2] RISC-V: Fix incorrect combine pattern for any_extend [PR123317]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH v1 2/2] RISC-V: Add run test case for vwadd/vwsub wx mis combine [PR123317]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Restore inline expansion of block moves on RISC-V in some cases   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH v3] match.pd: popcount(X & -X) -> -X != 0 [PR102486]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: -mrvv-max-lmul=conv-dynamic [PR122846].   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Clamp long reservations to 7c   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] ifcvt: Reject inner floating modes of a subreg for noce_try_cond_zero_arith [PR123491]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Update tt-ascalon-d8's extension list [PR123492]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] forwprop: Use ssizetype for mask [PR123414].   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add support for _BitInt [PR117581]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] VN: Fix VN ICE for large _BitInt types   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] rtlanal: Determine nonzero bits of popcount from operand [PR123501].   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] if-conv: Prevent vector types in scalar cond reduction [PR123301].   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] forwprop: Fix type mismatch in vec constructor [PR123525].   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] ifcvt: Improve `cmp?a&b:a` to try with -1 [PR123312]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] match: Add simplification of `(a*zero_one_valued_p) & b` if `a & b` simplifies [PR119402]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Enable the ZD constraint only when xmipscbop is enabled [PR123092]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Fix RISC-V test after recent vectorizer changes   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PR123092, LRA]: Reprocess insn after equivalence substitution   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PR target/121778] Improving rotation detection   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] forwprop: Check type conversion in pack/unpack [PR123117].   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] forwprop: allow subvectors in simplify_vector_constructor ()   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] forwprop: Allow nop conversions for vector constructor.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] vect: Make SELECT_VL a convert optab.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] doc, riscv: Clean up documentation of RISC-V options [PR122243]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PR target/113666] Simplify VEC_EXTRACT from a uniform vector   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR rtl-optimization/121787] Work around bad cfglayout interaction with asm goto   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/123626] Fix VXRM state after calls   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PR rtl-optimization/123380] Avoid creating bogus SUBREG in combine   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Correct builtin registration order [PR123279].   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] forwprop: More nop-conversion handling [PR123731].   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add zvfbfmin to tt-ascalon-d8's extension list [PR123492]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix indexed store output template [PR123780].   Jeff Law
• [gcc/riscv/heads/gcc-15-with-riscv-opts] (613 commits) RISC-V: Fix indexed store output template [PR123780].   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] RISC-V: Do not free a riscv_arch_string when handling target-arch attribute   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] [RISC-V] Tune for removal unnecessary sext in builtin overflows [PR108016]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] riscv: Add support for riscv*-gnu (GNU/Hurd on RISC-V)   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Fix missed bext discovery   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/118410] Improve code generation for some logical ops   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/119865] Don't free ggc allocated memory   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [riscv] vec_dup immediate constants in pred_broadcast expand [PR118182]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] [RISC-V]Support -mcpu for Xuantie cpu   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] RISC-V: Imply C from Zca whenever possible [PR119122]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Extract vec_duplicate for expand_const_vector [NFC]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Extract vec_series for expand_const_vector [NFC]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Extract vector duplicate for expand_const_vector [NFC]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Extract vector stepped for expand_const_vector [NFC]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix register move cost for SIBCALL_REGS/JALR_REGS   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add intrinsics support for SiFive Xsfvcp extensions.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add intrinsics testcases for SiFive Xsfvcp extensions.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix missing implied Zicsr from Zve32x   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Allow different dynamic floating point mode to be merged [PR119832]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Remove unnecessary frm restore volatile define_insn   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [to-be-committed][RISC-V] Adjust testcases and finish register move costing fix   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] RISC-V: Implment H modifier for printing the next register name   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Adjust rvv tests after recent jump threading change   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [V2][RISC-V] Trivial permutation constant derivation   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Apply clang-format to genrvv-type-indexer.cc [NFC]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix gcc.target/riscv/predef-19.c [PR120054]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add new option --param=gpr2vr-cost= for rvv insn   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add gr2vr cost helper function   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vadd.vv to vadd.vx on GR2VR cost   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcases for vec_duplicate + vadd.vv combine when GR2VR cost 0   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcases for vec_duplicate + vadd.vv combine when GR2VR cost 1   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcases for vec_duplicate + vadd.vv combine when GR2VR cost 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR middle-end/114512] Recognize more bext idioms for RISC-V   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] RISC-V: Recognized svadu and svade extension   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] RISC-V: Minimal support for sdtrig and ssstrict extensions.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Avoid unnecessary andi with -1 argument   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] RISC-V: Minimal support for zama16b extension.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/120137][PR target/120154] Don't create out-of-range permutation constants   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Separate the test running of rvv vx_vf   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Rename VX_BINARY test helper to VX_BINARY_CASE_0   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcases for vec_duplicate + vadd.vv combine case 1 with GR2VR cost 0   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcases for vec_duplicate + vadd.vv combine case 1 with GR2VR cost 1   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcases for vec_duplicate + vadd.vv combine case 1 with GR2VR cost 2   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH v2] RISC-V: Use vclmul for CRC expansion if available   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [V2][RISC-V] Synthesize more efficient IOR/XOR sequences   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Support RISC-V Profiles 20/22.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Support RISC-V Profiles 23.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] testsuite: Fix RISC-V arch-52.c format issue.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Support for zilsd and zclsd extensions.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Minimal support for ssnpm, smnpm and smmpm extensions.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcases for scalar unsigned integer SAT_ADD form 7   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcases for vector unsigned integer SAT_ADD form 7   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Introduce riscv-ext*.def to define extensions   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Use riscv-ext.def to generate target options and variables   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Generate extension table in documentation from riscv-ext.def   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Adjust riscv_can_inline_p   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Introduce riscv_ext_info_t to hold extension metadata   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Drop riscv_implied_info and riscv_combine_info in favor of riscv_ext_info_t data   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Drop riscv_ext_version_table in favor of riscv_ext_info_t data   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Drop riscv_ext_flag_table in favor of riscv_ext_info_t data   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Regen riscv-ext.opt.urls   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Drop duplicate build rule for riscv-ext.opt [NFC]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add augmented hypervisor series extensions.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix uninit riscv_subset_list::m_allow_adding_dup issue   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/120223] Don't use bset/binv for XTHEADBS   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vsub.vv to vsub.vx on GR2VR cost   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Rename vx_vadd-* testcase to vx-* for all vx combine [NFC]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Adjust vx combine test case to avoid name conflict   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vsub.vv combine case 0 with GR2VR cost 0   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vsub.vv combine case 0 with GR2VR cost 1   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vsub.vv combine case 0 with GR2VR cost 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vsub.vv combine case 1 with GR2VR cost 0   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vsub.vv combine case 1 with GR2VR cost 1   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vsub.vv combine case 1 with GR2VR cost 2   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Reuse test name for vx combine test data [NFC]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Make end_sequence return the insn sequence   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Partial cherry-pick of 4dd13988c93c24ba3605f4b9cafc97515c34f2ac, just the RISC-V backend bits.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Avoid scalar unsigned SAT_ADD test data duplication   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Since the loop increment i++ is unreachable, the loop body will never execute more than once   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Avoid setting output object more than once in IOR/XOR synthesis   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Fix ICE due to bogus use of gen_rtvec   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add new operand constraint: cR   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Support Zilsd code gen   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Rename conflicting variables in gen-riscv-ext-texi.cc   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix the warning of temporary object dangling references.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Fix false positive from Wuninitialized   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [committed][RISC-V][PR target/120333] Remove bogus bext pattern   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vrsub.vv to vrsub.vx on GR2VR cost   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vrsub.vv combine case 0 with GR2VR cost 0   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vrsub.vv combine case 0 with GR2VR cost 1   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vrsub.vv combine case 0 with GR2VR cost 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vrsub.vv combine case 1 with GR2VR cost 0   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vrsub.vv combine case 1 with GR2VR cost 1   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vrsub.vv combine case 1 with GR2VR cost 2   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Tweak the asm check test of vx combine on GR2VR cost [NFC]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Avoid multiple assignments to output object   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH v2 1/2] The following changes enable P8700 processor for RISCV and P8700 is a high-performanc   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH v2 2/2] MIPS p8700 doesn't have vector extension and added the dummies reservation for the sa   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Infrastructure of synthesizing logical AND with constant   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: RISC-V: Combine vec_duplicate + vand.vv to vand.vx on GR2VR cost   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vand.vv combine case 0 with GR2VR cost 0, 2 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vand.vv combine case 1 with GR2VR cost 0, 1 and 2   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/120368] Fix 32bit shift on rv64   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Improve (x << C1) + C2 split code   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Clear high or low bits using shift pairs   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] testsuite: RISC-V: Update the cset-sext-sfb/zba-slliuw test optimization level.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH][RISC-V][PR target/70557] Improve storing 0 to memory on rv32   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Clear both upper and lower bits using 3 shifts   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix some dynamic LMUL costing.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Default-initialize variable.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add autovec mode param.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Support CPUs in -march.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vor.vv to vor.vx on GR2VR cost   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vor.vv combine case 0 with GR2VR cost 0, 2 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vor.vv combine case 1 with GR2VR cost 0, 1 and 2   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] shift+and+shift for logical and synthesis   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V:Add testcases for signed .SAT_ADD IMM form 1 with IMM = -1.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcases for signed vector SAT_ADD IMM form 1   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vxor.vv to vxor.vx on GR2VR cost   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vxor.vv combine case 0 with GR2VR cost 0, 2 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vxor.vv combine case 1 with GR2VR cost 0, 1 and 2   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Add andi+bclr synthesis   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Leverage vaadd.vv for signed standard name avg_floor   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Reconcile the existing test for avg_floor   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test cases for avg_floor vaadd implementation   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Avoid division by zero in check_builtin_call [PR120436].   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vmul.vv to vmul.vx on GR2VR cost   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vmul.vv combine case 0 with GR2VR cost 0, 2 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vmul.vv combine case 1 with GR2VR cost 0, 1 and 2   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add minimal support of double trap extension 1.0   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Leverage vaadd.vv for signed standard name avg_ceil   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Reconcile the existing test for avg_ceil   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test cases for avg_ceil vaadd implementation   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix line too long format issue for autovect.md [NFC]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] testsuite: RISC-V: Fix the typo in param-autovec-mode.c   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Implement full-featured iterator for riscv_subset_list [NFC]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Adjust build rule for gen-riscv-ext-opt and gen-riscv-ext-texi   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] RISC-V: Add smcntrpmf extension.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add pattern for vector-scalar multiply-add/sub [PR119100]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Use helper function to get FPR to VR move cost   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vidv.vv to vdiv.vx on GR2VR cost   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vdiv.vv combine case 0 with GR2VR cost 0, 2 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vdiv.vv combine case 1 with GR2VR cost 0, 1 and 2   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Reconcile the existing test for vdiv.vx combine   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add Shlcofideleg extension.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Leverage get_vector_binary_rtx_cost to avoid code dup [NFC]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH v2] RISC-V: Add svbare extension.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] RISC-V: Imply zicsr for svade and svadu extensions.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Update extension defination.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Support Sm/scsrind extensions.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Support Smrnmi extension.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Support Ssccptr extension.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Support Sscounterenw extension.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Support Sstvala extension.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Support Sstvecd extension.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Support Ssu64xl extension.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Improve sequences to generate -1, 1 in some cases.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix ICE for gcc.dg/graphite/pr33576.c with rv32gcv   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Don't use structured binding in riscv-common.cc   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Improve signed division by 2^n   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Support -mcpu for XiangShan Kunminghu cpu.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vidvu.vv to vdivu.vx on GR2VR cost   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vdivu.vv combine case 0 with GR2VR cost 0, 2 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vdivu.vv combine case 1 with GR2VR cost 0, 1 and 2   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Reconcile the existing test for vdivu.vx combine   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [to-be-committed][RISC-V] Handle 32bit operands in condition for conditional moves   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Handle 32bit operands in condition for conditional moves   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: frm/mode-switch: remove TARGET_MODE_CONFLUENCE   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: frm/mode-switch: remove dubious frm edge insertion before call_insn   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: frm/mode-switch: Reduce FRM restores on DYN transition [PR119164]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: frm/mode-switch: robustify call_insn backtracking [PR120203]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vrem.vv to vrem.vx on GR2VR cost   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Reconcile the existing test for vrem.vx combine   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vrem.vv combine case 0 with GR2VR cost 0, 2 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vrem.vv combine case 1 with GR2VR cost 0, 1 and 2   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Enable more if-conversion on RISC-V   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vremu.vv to vremu.vx on GR2VR cost   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Reconcile the existing test for vremu.vx combine   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vremu.vv combine case 0 with GR2VR cost 0, 2 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vremu.vv combine case 1 with GR2VR cost 0, 1 and 2   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Regen riscv-ext.texi [NFC]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: testsuite: fix an obvious build error   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add patterns for vector-scalar negate-(multiply-add/sub) [PR119100]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Prevent speculative vsetvl insn scheduling   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vmax.vv to vmax.vx on GR2VR cost   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_dup + vmax.vv combine case 0 with max func 0 and GR2VR cost 0, 2 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_dup + vmax.vv combine case 0 with max func 1 and GR2VR cost 0, 2 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_dup + vmax.vv combine case 1 with max func 0 and GR2VR cost 0, 1 and 2   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_dup + vmax.vv combine case 1 with max func 1 and GR2VR cost 0, 1 and 2   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vmaxu.vv to vmaxu.vx on GR2VR cost   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vmaxu.vv combine case 0 with GR2VR cost 0, 2 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vmaxu.vv combine case 1 with GR2VR cost 0, 1 and 2   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Update Profiles string in RV23.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Refine VX combine test case 0 to avoid code duplication   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add -fno-pie flags to testcases   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH v1] RISC-V: Use scratch reg for loop control   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vmin.vv to vmin.vx on GR2VR cost   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vmin.vv combine case 0 with GR2VR cost 0, 2 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vmin.vv combine case 1 with GR2VR cost 0, 1 and 2   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Adding cost model for zilsd   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Use riscv_2x_xlen_mode_p [NFC]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add generic tune as default.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vminu.vv to vminu.vx on GR2VR cost   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vminu.vv combine case 0 with GR2VR cost 0, 2 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vminu.vv combine case 1 with GR2VR cost 0, 1 and 2   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] RISC-V: Use builtin clz/ctz when count_leading_zeros and count_trailing_zeros is used   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Force several tests to use rocket tuning   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix ICE for expand_select_vldi [PR120652]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/118241] Fix data prefetch predicate/constraint for RISC-V   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vsaddu.vv to vsaddu.vx on GR2VR cost   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vsaddu.vv combine case 0 with GR2VR cost 0, 2 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vsaddu.vv combine case 1 with GR2VR cost 0, 1 and 2   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add patterns for vector-scalar multiply-(subtract-)accumulate [PR119100]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add Profiles RVA/B23S64 support.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add comment and reorder the the include files in riscv.md [NFC]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix build issue   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: update prepare_ternary_operands to handle vector-scalar case [PR120828]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/119971] Avoid losing shift count masking   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add pipeline-checker script   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Refactor the function bitmap_union_of_preds_with_entry   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Vector-scalar negate-multiply-(subtract-)accumulate [PR119100]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Adding B ext, fp16 and missing scalar instruction type for sifive-7 pipeline model [PR120659   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Primary vector pipeline model for sifive 7 series   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Ignore -Oz for most rvv testcase [NFC]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vssubu.vv to vssubu.vx on GR2VR cost   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Reconcile the existing test due to cost model change   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vssubu.vv combine case 0 with GR2VR cost 0, 2 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vssubu.vv combine case 1 with GR2VR cost 0, 1 and 2   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] [RISC-V] Fix shift type for RVV interleaved stepped patterns [PR120356]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: testsuite: Skip tests providing -march/-mcpu for ILP32E/ILP64E ABIs   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/118886] Refine when two insns are signaled as fusion candidates   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Refactor record_function_versions.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcases for signed scalar SAT_ADD IMM form 2   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Add basic instrumentation to fusion detection   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vsadd.vv to vsadd.vx on GR2VR cost   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vsadd.vv combine case 0 with GR2VR cost 0, 2 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vsadd.vv combine case 1 with GR2VR cost 0, 1 and 2   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Implement unsigned scalar SAT_MUL from uint128_t   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test cases for unsigned scalar SAT_MUL from uint128_t   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [committed][RISC-V] Fix testsuite fallout from check-function-bodies change   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Ignore non-types in builtin function hash.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Do not use vsetivli for THeadVector.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Disable uint128_t testcase of SAT_MUL when rv32   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/120642] Avoid propagating constant AVL for theadvector   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] RISC-V: Adjust testdata for unsigned vector SAT_SUB   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] RISC-V: Enable zvfh for vector-scalar half-float run tests   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vssub.vv to vssub.vx on GR2VR cost   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vssub.vv combine case 0 with GR2VR cost 0, 2 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vssub.vv combine case 1 with GR2VR cost 0, 1 and 2   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISCV: Remove the v extension requirement for sat scalar run test   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Detect new fusions for RISC-V   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Make zero-stride load broadcast a tunable.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcases for unsigned vector SAT_SUB form 11 and form 12   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH v2] RISC-V: Vector-scalar widening multiply-(subtract-)accumulate [PR119100]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcase for rv32 SAT_MUL from uint64   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH v5] RISC-V: Mips P8700 Conditional Move Support.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Support RVVDImode for avg3_floor auto vect   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Refine the scalar SAT_* test cases   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix vsetvl merge rule.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Support RVVDImode for avg3_ceil auto vect   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] RISC-V: prevent NULL_RTX dereference in riscv_macro_fusion_pair_p ()   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] RISC-V: Vector-scalar widening negate-multiply-(subtract-)accumulate [PR119100]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add ashiftrt operand 2 for vector avg_floor and avg_ceil   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Refine the test case for vector avg_floor and avg_ceil [NFC]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcase for unsigned scalar SAT_ADD form 8 and form 9   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vaaddu.vv to vaaddu.vx on GR2VR cost for HI, QI and SI mode   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vaaddu.vv combine case 0 with GR2VR cost 0, 2 and 15 for QI, HI   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vaaddu.vv combine case 1 with GR2VR cost 0, 1 and 2 for QI, HI   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Allow VLS DImode for sat_op vx DImode pattern   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vaaddu.vv combine for DImode   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Add missing insn types to xiangshan.md and mips-p8700.md   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Restrict generic-vector-ooo DFA   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Change bellow in comments to below   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: testsuite: Fix vx_vf_*run-1-f16.c run tests.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Rework broadcast handling [PR121073].   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Avoid vaaddu.vx combine pattern pollute VXRM csr   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test case for vx combine polluting VXRM   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] riscv: testsuite: Fix misalignment check.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add support for resumable non-maskable interrupt (RNMI) handlers   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Remove user-level interrupts   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Prepare dynamic LMUL heuristic for SLP.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: riscv-ext.def: Add allocated group IDs and group bit positions   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix another vf FP16 combine run test failures   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vaadd.vv to vaadd.vx on GR2VR cost   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vaadd.vv combine case 0 with GR2VR cost 0, 1 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vaadd.vv combine case 1 with GR2VR cost 0, 1 and 2   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test case for vaadd.vx combine polluting VXRM   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test cases for mul based unsigned scalar SAT_MUL   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Remove use of structured binding to fix compiler warning   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Generate -mcpu and -mtune options from riscv-cores.def.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcases for unsigned avg ceil vx combine.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Adding H to the canonical order [PR121312]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcases for signed avg ceil vx combine   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix scalar code-gen of unsigned SAT_MUL   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Support -march=unset   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Read extension data from riscv-ext*.def for arch-canonicalize   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Refactor the vec_duplicate cost on gpr/fpr2vr-cost param   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcase for scalar unsigned SAT_MUL form 2   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Don't run tests requiring "B" on designs without "B"   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Improve initial code generation for addsi/adddi   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Expand const_vector with 2 elts per pattern.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vmerge.vv to vmerge.vx on GR2VR cost   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: RISC-V: Add test for vec_duplicate + vmerge.vvm combine with GR2VR cost 0, 1 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/121113] Handle HFmode in various insn reservations   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/121160] Avoid bogus force_reg call   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/121531] Cover missing insn types in p400 and p600 scheduler models   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PR target/119275][RISC-V] Avoid calling gen_lowpart in cases where it would ICE   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: MIPS prefetch extensions for MIPS RV64 P8700 and can be enabled with xmipscbop.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add missed DONE for vx combine pattern [NFC]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Update the comments of vx combine [NFC]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] RISC-V: Fix block matching in arch-canonicalize [PR121538]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] ira: tie output allocnos for fused instruction pairs   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] regrename: treat writes as reads for fused instruction pairs   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PR target/121213] Avoid unnecessary constant load in amoswap   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: testsuite: Fix DejaGnu support for riscv_zvfh   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcase for scalar unsigned SAT_MUL form 3   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PR rtl-optimization/120553] Improve selecting between constants based on sign bit test   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Fix invalid right shift count with recent ifcvt changes   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Replace deprecated FUNCTION_VALUE/LIBCALL_VALUE macros with target hooks   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vmacc.vv to vmacc.vx on GR2VR cost   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vmacc.vv signed combine with GR2VR cost 0, 1 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vmacc.vv unsigned combine with GR2VR cost 0, 1 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Fix RISC-V bootstrap   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] RISC-V: Add pattern for vector-scalar single-width floating-point multiply   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] RISC-V: Add pattern for reverse floating-point divide   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [committed] RISC-V Testsuite hygiene   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] More RISC-V testsuite hygiene   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: testsuite: Fix vf_vfmul and vf_vfrdiv   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Remove xfail marker on RISC-V test   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add pattern for vector-scalar floating-point min   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vnmsac.vv to vnmsac.vx on GR2VR cost   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vnmsac.vv signed combine with GR2VR cost 0, 1 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vnmsac.vv unsigned combine with GR2VR cost 0, 1 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add patterns for vector-scalar IEEE floating-point min   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test case for unsigned scalar SAT_MUL form 4   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Improve initial RTL generation for SImode adds on rv64   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Remove unused print_ext_doc_entry function [NFC]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Update Zba 'shNadd.uw' testcase.`   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add Zbb extension sext testcase.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix is_vlmax_len_p and use for strided ops.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/121213] Avoid unnecessary sign extension in amoswap sequence   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add pattern for vector-scalar floating-point max   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add basic XAndes vendor extension support.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add support for the XAndesperf ISA extension.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add support for the XAndesbfhcvt ISA extension.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix extension subset check in riscv_can_inline_p   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vmadd.vv signed combine with GR2VR cost 0, 1 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vmadd.vv unsigned combine with GR2VR cost 0, 1 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Adjust the vmacc.vx combine test cases   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Allow errors to be suppressed when parsing architectures   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vmadd.vv to vmadd.vx on GR2VR cost   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Adjust recently added test   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add tt-ascalon-d8 pipeline description   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add support for the XAndesvbfhcvt ISA extension.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add support for the XAndesvsintload ISA extension.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] gcc: introduce the dep_fusion pass   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] dep_fusion: Fix if target does not have macro fusion [PR121835]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vnmsub.vv to vnmsub.vx on GR2VR cost   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vnmsub.vv signed combine with GR2VR cost 0, 1 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vnmsub.vv unsigned combine with GR2VR cost 0, 1 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add support for the XAndesvpackfph ISA extension.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Fix ordering of pipeline models   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add support for the XAndesvdot ISA extension.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] gcc: introduce the dep_fusion pass   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add patterns for vector-scalar IEEE floating-point max   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add pattern for vector-scalar widening floating-point multiply   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add pattern for vector-scalar single-width floating-point add   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add pattern for vector-scalar single-width floating-point sub   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add pattern for vector-scalar single-width floating-point reverse sub   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Adjust tt-ascalon-d8 branch cost   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add pattern for vector-scalar widening floating-point add   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add pattern for vector-scalar single widening floating-point add   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add pattern for vector-scalar dual widening floating-point sub   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add pattern for vector-scalar single widening floating-point sub   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix typo in tt-ascalon-d8's pipeline description [PR121878]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix can_find_related_mode_p for VLS types   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] ifcvt: Clarify if_info.original_cost.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add min/max patterns for ifcvt.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Suppress cross CC sibcall optimization from vector   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Adjust ABI specification in recently added Andes tests   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Match: Support SAT_TRUNC variant NARROW_CLIP   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Support vnclip idiom testcase [PR120378]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix vendor intrinsic tests for disabled multilib configurations   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Widening-Mul: Refine build_and_insert_cast when rhs is cast   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Imply zicsr for sdtrig and ssstrict extensions.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Configure Profiles definitions in the definition file.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Allow profiles input in '--with-arch' option.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vwaddu.vv to vwaddu.vx on GR2VR cost   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vwaddu.vv signed combine with GR2VR cost 0, 1 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vwsubu.vv signed combine with GR2VR cost 0, 1 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vwmulu.vv signed combine with GR2VR cost 0, 1 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PR tree-optimization/58727] Don't over-simplify constants`   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test case of unsigned scalar SAT_MUL form 5 for widen-mul   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Correct lmul estimation   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Optimize clear-lowest-set-bit sequence when ctz is nearby   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Only Save/Restore required registers for ILP32E/LP64E   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Improve slide patterns recognition   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/121983] Fix unprotected REGNO invocation   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add missing define_insn_reservation to tt-ascalon-d8.md [PR121982]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test case of unsigned scalar SAT_MUL form 5 for mul   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH][PR target/121778] RISC-V: Improve rotation detection for RISC-V   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/122106] Add missing predicate on crc expanders   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/122051] Fix pmode_reg_or_uimm5_operand for thead vector   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR rtl-optimization/121937] Don't call neg_poly_int_rtx with a vector mode   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PR target/118945][PATCH v3] RISC-V: Add 'prefer_agnostic' tune parameter for vector policies   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/122147] Avoid creating (subreg (mem)) in RISC-V port   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH v2] RISC-V: Fix type of CFA during stack probe [PR122114]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Fixup merge conflict   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] ISC-V: Add test for vec_duplicate + vwaddu.wv signed combine with GR2VR cost 0, 1 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vwaddu.wv to vwaddu.wx on GR2VR cost   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] RISC-V: Fix slide pattern recognition [PR122124]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Allow VLS types using up to LMUL 8   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vwsubu.wv to vwsubu.wx on GR2VR cost   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vwsubu.wv combine with GR2VR cost 0, 1 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Improve subword atomic patterns in sync.md   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PR target/119587] RISC-V: xtheadmemidx: Split slli.uw pattern   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/120811] Improving address reloads in LRA   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH v3] RISC-V: Implement RISC-V profile macro support   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix incorrect op of vwaddu/vwsubu wx combine   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcase for unsigned scalar SAT_MUL form 6   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Fix minor testsuite scan failures for RISC-V   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Fix minor RISC-V testsuite failure   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH v2] RISC-V: Fix moving data from V_REGS to GR_REGS by scalar move.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Increase NUM_ABI_IDS to support RISC-V VLS calling convention variants   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/64345][PR tree-optimization/80770] Improve simple bit extractions on RISC-V   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Implement standard fixed-length vector calling convention variant   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testsuite for fixed-length vector calling convention variant [Part 1]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testsuite for fixed-length vector calling convention variant [Part 2]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Skip riscv/rvv/xtheadvector/pr116593.C if not hostedlib   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Clean up build warnings for VLS calling convention   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH v2] RISC-V: avlprop: Scale AVL by subreg ratio [PR122445].   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] niter: Use ranger to query ctz range.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] tree-optimization/122502 - avoid folding during imm use walk with active ranger   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Reorder ready queue slightly to avoid unnecessary vsetvl instructions   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][SH][PR rtl-optimization/67731] Improve logical IOR of single bit bitfields   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] gcc: Drop junk vim backup file   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Expose sign extension for 32 bit rotates by constant values on rv64   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR tree-optimization/52345] Optimize testing multiple booleans   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix the ABI of empty unions and zero length array in struct   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PR rtl-optimization/122536] Fix guard against variable bit extracts in RTL simplifier   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: testsuite: Fix pr119115.c.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR 121136] Improve various tests which only need to examine upper bits in a GPR   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Ignore useless zero-initialization in conditional move sequence costing   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: RISC-V: Combine vec_duplicate + vwmaccu.vv to vwmaccu.vx on GR2VR cost   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vwmaccu.vv combine with GR2VR cost 0, 1 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vsext.vf2 and vsll.vi to vwsll.vi on ZVBB   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Add testcase for shifted truthvalue   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vmseq.vv combine case 0 with GR2VR cost 0, 1 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vmseq.vv combine case 1 with GR2VR cost 0, 1 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Simplify riscv_extend_to_xmode_reg   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Improve detection of packw   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add Andes 25 series pipeline description.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Handle shift-pairs in ext-dce for targets without zero/sign extension insns   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add missing member for andes_25_tune_info   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Drop scan-tests of marginal value   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Avoid most calls to gen_extend_insn   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vmsne.vv combine case 0 with GR2VR cost 0, 1 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vmsne.vv combine case 1 with GR2VR cost 0, 1 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PR rtl-optimization/122575] Fix mode on optimized IOR comparison   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Remove gather scale and offset handling.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Add cpu and tuning structures for spacemit-x60 design   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add flag to adjust mem inlining threshold   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Fix trivial bootstrap failure on RISC-V   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add RTL pass to combine cm.popret with zero return value   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PR118358, LRA]: Decrease pressure after issuing input reload insns   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PR 122701] Emit fresh reg->reg copy rather than modifying existing insnO   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PR rtl-optimization/122782] Fix out of range shift causing bootstrap failure with ubsan   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add BF VLS modes and document iterators.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcase for unsigned scalar SAT_MUL form 7   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Revert "[PATCH v3] RISC-V: Implement RISC-V profile macro support"   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix one typo result in pr121959-run-1 run failure   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add Andes 23 series pipeline description.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add Andes 45 series pipeline description.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Run gen-riscv-ext-opt to regenerate riscv-ext.opt [NFC]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add SpacemiT extension xsmtvdot   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Support --with-cpu   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Emit \n\t at the end of instruction instead of ;   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] riscv: RISCV backend, meet C++20   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH][PR target/122942] RISC-V: Add zifencei extension to the rva23s64 and rvb23s64 profiles [PR12   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Remove unused placeholder_p parameter from add_function   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vmsltu.vv to vmsltu.vx on GR2VR cost   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vmsltu.vv combine with GR2VR cost 0, 1 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [riscv] avoid auipc overflow with large offsets [PR91420]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Implement mask reduction.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Pragma target [PR115325].   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] middle-end: Add new parameter to scale scalar loop costing in vectorizer   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] vect: Add vect-scalar-cost-multiplier for SLP.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: -mmax-vectorization.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Regenerate opt urls.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vmslt.vv to vmslt.vx on GR2VR cost   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vmslt.vv combine with GR2VR cost 0, 1 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] RISC-V: Rename UPPERCAE_NAME to UPPERCASE_NAME   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Fix various RISC-V testsuite regressions after volatile patch   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Change gather/scatter iterators.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Rename vector-mode related functions.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add VLS modes to autovec iterators.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Generic vec_extract via subreg.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Testsuite fixes.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix overflow check in interleave pattern [PR122970].   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][V2] Improve spill code for RVV slightly to fix regressions after recent changes   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] ifcvt: cond zero arith: opencode helper noce_bbs_ok_for_cond_zero_arith [NFC]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] ifcvt: cond zero arith: factor out common noce_emit_czero emit calls [NFC]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] ifcvt: cond zero arith: re-expand output pattern [NFC]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] ifcvt: cond zero arith: elide short forward branch for signed GE 0 comparison [PR122769]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] ifcvt: cond zero arith: handle subreg for shift count   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][V2] Improve spill code for RVV slightly to fix regressions after recent changes   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] ifcvt: Fix noce_try_cond_zero_arith after get_base_reg change [PR123267]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PATCH] Adjust clmul latency in Spacemit X60 scheduler model   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/123278] Handle BF/HF modes in Andes 45 series pipeline description   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [committed][RISC-V][PR target/123274] Add missing condition in usmul<mode>3 pattern   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] ifcvt: Only allow scalar integral modes for noce_try_cond_zero_arith [PR123276]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] ifcvt: Move noce_try_cond_zero_arith last   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vmsleu.vv to vmsleu.vx on GR2VR cost   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vmsleu.vv combine with GR2VR cost 0, 1 and 15   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] doc, riscv: Clean up RISC-V extensions documentation   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] doc: make regenerate-opt-urls   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/123283] Wrap naked REG operands with a USE.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Revert "ifcvt: Move noce_try_cond_zero_arith last"   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] simplify-rtx: Fix up (ne (ior (ne x 0) y) 0) simplification [PR123114]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] ifcvt: cleanup if_info->cond usage in noce_try_cond_zero_arith   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] ifcvt: Handle lowpart subregs if noce_emit_cmove fails in noce_try_cond_zero_arith [PR123308]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] ifcvt: Allow non-comparisons against 0 in noce_try_cond_zero_arith   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/123318] Use a Pmode temporary for output of auipc   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/121485] Fix mode on Zvkned lmul extending patterns   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PR target/123010] Simplify shift of sign extracted field to a sign extending shift   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Partially revert patch that made VXRM a global register on RISC-V   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Vect: Adjust depth_limit of vec_slp_has_scalar_use from 2 to 3   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Adjust the asm check of vx_vf due to middle-end change   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH v1 1/2] RISC-V: Fix incorrect combine pattern for any_extend [PR123317]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH v1 2/2] RISC-V: Add run test case for vwadd/vwsub wx mis combine [PR123317]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Restore inline expansion of block moves on RISC-V in some cases   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH v3] match.pd: popcount(X & -X) -> -X != 0 [PR102486]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Clamp long reservations to 7c   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] ifcvt: Reject inner floating modes of a subreg for noce_try_cond_zero_arith [PR123491]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Update tt-ascalon-d8's extension list [PR123492]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] forwprop: Use ssizetype for mask [PR123414].   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add support for _BitInt [PR117581]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] VN: Fix VN ICE for large _BitInt types   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] rtlanal: Determine nonzero bits of popcount from operand [PR123501].   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] if-conv: Prevent vector types in scalar cond reduction [PR123301].   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] forwprop: Fix type mismatch in vec constructor [PR123525].   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] ifcvt: Improve `cmp?a&b:a` to try with -1 [PR123312]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] match: Add simplification of `(a*zero_one_valued_p) & b` if `a & b` simplifies [PR119402]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Enable the ZD constraint only when xmipscbop is enabled [PR123092]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Fix RISC-V test after recent vectorizer changes   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PR target/121778] Improving rotation detection   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] forwprop: Check type conversion in pack/unpack [PR123117].   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] forwprop: allow subvectors in simplify_vector_constructor ()   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] forwprop: Allow nop conversions for vector constructor.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] vect: Make SELECT_VL a convert optab.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] doc, riscv: Clean up documentation of RISC-V options [PR122243]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PR target/113666] Simplify VEC_EXTRACT from a uniform vector   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR rtl-optimization/121787] Work around bad cfglayout interaction with asm goto   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/123626] Fix VXRM state after calls   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PR rtl-optimization/123380] Avoid creating bogus SUBREG in combine   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Correct builtin registration order [PR123279].   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] forwprop: More nop-conversion handling [PR123731].   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add zvfbfmin to tt-ascalon-d8's extension list [PR123492]   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix indexed store output template [PR123780].   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] forwprop: Pun with integer type if needed [PR123799].   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix ABI vector passing on stack and GPR [PR123824].   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: testsuite: Add zvl requirement to PR123626.   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix intrinsic FoF load at -O0 [PR122869].   Jeff Law
• [gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Handle VL-setting FoF loads. [PR123806]   Jeff Law
• [gcc r16-7216] [PATCH] picolibc: Use %:find-file for both test and access to picolibc.ld   Jeff Law
• [gcc r16-6902] testsuite/123175 - Use int32_t instead of int in vec-type construction.   Georg-Johann Lay
• [gcc r16-6929] AVR: AVR-LibC's setjmp preserves callee-saved regs.   Georg-Johann Lay
• [gcc r16-6498] Vect: Adjust depth_limit of vec_slp_has_scalar_use from 2 to 3   Pan Li
• [gcc r16-6499] RISC-V: Adjust the asm check of vx_vf due to middle-end change   Pan Li
• [gcc r16-7109] expand: Increase stack slot alignment for STRICT_ALIGNMENT targets [PR123447]   Pengfei Li
• [gcc r16-6729] Add TARGET_MMX_WITH_SSE to the condition of all 64-bit _Float16 vector related patterns.   hongtao Liu
• [gcc r15-10666] Add TARGET_MMX_WITH_SSE to the condition of all 64-bit _Float16 vector related patterns.   hongtao Liu
• [gcc r14-12237] Add TARGET_MMX_WITH_SSE to the condition of all 64-bit _Float16 vector related patterns.   hongtao Liu
• [gcc r16-6964] Add u-arch tune prefer_bcst_from_integer.   hongtao Liu
• [gcc r16-6862] doc, rl78: Clean up RL78 option documentation [PR122243] [PR71340]   Sandra Loosemore
• [gcc r16-6863] doc, rs6000: Clean up RS/6000 options documentation [PR122243]   Sandra Loosemore
• [gcc r16-6864] doc, rx: Clean up RX options documentation [PR122243]   Sandra Loosemore
• [gcc r16-6865] doc, s390: Clean up S/390 and z series options [PR122243]   Sandra Loosemore
• [gcc r16-6866] doc, sh: Clean up SH options documentation [PR122243]   Sandra Loosemore
• [gcc r16-6867] doc, Solaris: Clean up documentation of Solaris 2 options [PR122243]   Sandra Loosemore
• [gcc r16-6868] doc, sparc: Clean up SPARC option documentation [PR122243]   Sandra Loosemore
• [gcc r16-6869] doc, v850: Clean up V850 options and documentation [PR122243]   Sandra Loosemore
• [gcc r16-6870] doc, vax: Clean up VAX option documentation [PR122243]   Sandra Loosemore
• [gcc r16-6871] doc, visium: Clean up Visium options documentation [PR122243]   Sandra Loosemore
• [gcc r16-6872] doc, vms: Clean up VMS options [PR122243]   Sandra Loosemore
• [gcc r16-6873] doc, VxWorks: Clean up VxWorks option documentation [PR122243]   Sandra Loosemore
• [gcc r16-6874] doc, x86: Clean up x86 options documentation [PR122243]   Sandra Loosemore
• [gcc r16-6875] doc, xtensa: Clean up Xtensa options documentation [PR122243]   Sandra Loosemore
• [gcc r16-6876] doc, nds32: Add missing documentation for nds32 options [PR122243]   Sandra Loosemore
• [gcc r16-6877] doc: make regenerate-opt-urls   Sandra Loosemore
• [gcc r16-7021] doc, lynx: Document LynxOS options [PR122243]   Sandra Loosemore
• [gcc r16-7022] doc: Mark -foffload-abi and -foffload-abi-host-opts undocumented [PR67300]   Sandra Loosemore
• [gcc r16-7023] doc: -g debug option documentation cleanup [PR122243]   Sandra Loosemore
• [gcc r16-7024] doc: Mark more options as Undocumented/RejectNegative [PR122243]   Sandra Loosemore
• [gcc r16-7025] doc: Fix various option documentation problems [PR122243]   Sandra Loosemore
• [gcc r16-7026] doc: Add missing index entries for -Wno-* options [PR122243]   Sandra Loosemore
• [gcc r16-7027] doc: Add missing index entries for -fno-* options [PR122243]   Sandra Loosemore
• [gcc r16-7028] doc: whitespace fixes in option summary   Sandra Loosemore
• [gcc r16-7029] doc: make regenerate-opt-urls   Sandra Loosemore
• [gcc r16-7032] Fix gcc-urlifier selftest failure   Sandra Loosemore
• [gcc r16-7150] doc: Add "user experience" documentation for options   Sandra Loosemore
• [gcc r16-6730] pr122458.c: Replace .quad with .dc.a   H.J. Lu
• [gcc r16-6789] LoongArch: Fix ICE when explicit-relocs is none   LuluCheng
• [gcc r15-10676] LoongArch: Fix ICE when explicit-relocs is none   LuluCheng
• [gcc r14-12241] LoongArch: Fix ICE when explicit-relocs is none   LuluCheng
• [gcc r16-6815] LoongArch: Fix bug123521.   LuluCheng
• [gcc r15-10678] LoongArch: Fix bug123521.   LuluCheng
• [gcc r14-12243] LoongArch: Fix bug123521.   LuluCheng
• [gcc r16-6890] LoongArch: Fix bug117575.   LuluCheng
• [gcc r15-10706] LoongArch: Fix bug117575.   LuluCheng
• [gcc r14-12250] LoongArch: Fix bug117575.   LuluCheng
• [gcc r16-7162] LoongArch: Fix movsf in lp64s abi   LuluCheng
• [gcc r16-7163] LoongArch: Fix bug123807.   LuluCheng
• [gcc r15-10753] LoongArch: Fix bug123807.   LuluCheng
• [gcc r14-12283] LoongArch: Fix bug123807.   LuluCheng
• [gcc r16-7164] LoongArch: Fix bug123766.   LuluCheng
• [gcc r16-7165] LoongArch: Remove unused function type.   LuluCheng
• [gcc r14-12284] LoongArch: Fix bug123766.   LuluCheng
• [gcc r14-12285] LoongArch: Remove unused function type.   LuluCheng
• [gcc r15-10754] LoongArch: Fix bug123766.   LuluCheng
• [gcc r15-10755] LoongArch: Remove unused function type.   LuluCheng
• [gcc r16-6646] arm: always enable both simd and mve builtins   Christophe Lyon
• [gcc r16-7069] testsuite: arm: Add another expected output in vdupq_n_f32.c   Christophe Lyon
• [gcc r16-6675] libstdc++: constexpr flat_map and flat_multimap   Yuao Ma
• [gcc r16-6550] Always snap subranges after intersection.   Andrew Macleod
• [gcc r16-6551] Early builtin_unreachable removal must examine dependencies.   Andrew Macleod
• [gcc r15-10667] Early builtin_unreachable removal must examine dependencies.   Andrew Macleod
• [gcc r14-12239] Early builtin_unreachable removal must examine dependencies.   Andrew Macleod
• [gcc r16-6937] Do not trap on a stmt with no basic block.   Andrew Macleod
• [gcc r16-6654] [PR123121, LRA]: Fix wrong rematerialization of insns with several outputs   Vladimir Makarov
• [gcc r13-10038] [PR123121, LRA]: Fix wrong rematerialization of insns with several outputs   Vladimir Makarov
• [gcc r14-12244] [PR123121, LRA]: Fix wrong rematerialization of insns with several outputs   Vladimir Makarov
• [gcc r15-10680] [PR123121, LRA]: Fix wrong rematerialization of insns with several outputs   Vladimir Makarov
• [gcc r16-6821] [PR123092, LRA]: Reprocess insn after equivalence substitution   Vladimir Makarov
• [gcc r16-6934] [PR122215, IRA]: Add missed test file   Vladimir Makarov
• [gcc r14-12252] [PR122215, IRA]: Add missed test file   Vladimir Makarov
• [gcc r15-10710] [PR122215, IRA]: Add missed test file   Vladimir Makarov
• [gcc r16-7119] [PR121571, LRA]: Reprocess asm insn with different preferences when there are no enough regs for the   Vladimir Makarov
• [gcc r16-7139] Fix AIX build break in gcc/diagnostics/sarif-sink.cc.   Sangamesh Malaya
• [gcc r16-6663] Add pub-sub.{h,cc}   David Malcolm
• [gcc r16-6664] Add publish/subscribe topics and channel: pass_events   David Malcolm
• [gcc r16-6665] diagnostics: add optional CFG dumps to SARIF/HTML output sinks   David Malcolm
• [gcc r16-6666] analyzer: replace PLUGIN_ANALYZER_INIT with a pub/sub channel   David Malcolm
• [gcc r16-6667] analyzer: port translation_unit_callbacks to pub/sub   David Malcolm
• [gcc r16-6668] analyzer: port pop_frame_callbacks to pub/sub   David Malcolm
• [gcc r16-6778] c++: use nesting and counts in print_candidates   David Malcolm
• [gcc r16-6779] c++: UX improvements for close matches in print_candidates   David Malcolm
• [gcc r15-10669] git_commit.py: add "diagnostics" to bug components   David Malcolm
• [gcc r15-10670] testsuite: fix typo in name of plugin test file   David Malcolm
• [gcc r15-10671] diagnostics: handle fatal_error in SARIF output [PR120063]   David Malcolm
• [gcc r15-10672] c++: fix count of z candidates for non-viable candidates, nesting [PR121966]   David Malcolm
• [gcc r15-10673] analyzer: fold X + (-X) to zero [PR122975]   David Malcolm
• [gcc r15-10674] analyzer: fix strlen(STRING_CST + OFFSET) [PR123085]   David Malcolm
• [gcc r16-6822] analyzer: eliminate unused field eh_dispatch_edge_op::m_dst_snode [PR123540]   David Malcolm
• [gcc r16-6823] analyzer: add timevar values for supergraph manipulation [PR123145]   David Malcolm
• [gcc r16-6824] analyzer: fix check against --param=analyzer-bb-explosion-factor=0   David Malcolm
• [gcc r16-6930] analyzer: fix -Wmaybe-uninitialized of 'edge_sense'   David Malcolm
• [gcc r16-6931] sarif-replay: skip "sarif:/" embedded links [PR123056]   David Malcolm
• [gcc r16-6961] analyzer: different decls don't alias   David Malcolm
• [gcc r16-6962] analyzer: ensure that concrete binding keys don't overlap   David Malcolm
• [gcc r16-6966] sarif-replay: improve path output when source is unavailable [PR122622]   David Malcolm
• [gcc r16-7053] analyzer: avoid calling binding_map::const_iterator::operator* [PR123145]   David Malcolm
• [gcc r16-7080] analyzer: add option -fanalyzer-assume-nothrow [PR122623]   David Malcolm
• [gcc r16-7206] analyzer: fix ICE on rethrow without throw [PR123880]   David Malcolm
• [gcc r16-6454] a68: fix portability problems in sppp.awk   Jose E. Marchesi
• [gcc r16-6466] a68: avoid conditional expression in sppp.awk   Jose E. Marchesi
• [gcc r16-6492] a68: disable psABI warnings for Algol 68   Jose E. Marchesi
• [gcc r16-6672] a68: Escape @ in ga68.texi   Jose E. Marchesi
• [gcc r16-6787] a68: fix documentation of -f[no-]brackets   Jose E. Marchesi
• [gcc r16-6788] a68: fix documentation of lseek in manual   Jose E. Marchesi
• [gcc r16-6852] a68: handle TImode in a68_type_for_{mode,size}   Jose E. Marchesi
• [gcc r16-6858] a68: do not define Number and whole as built-ins   Jose E. Marchesi
• [gcc r16-6860] a68: fix logic for name comparison in are_packs_equivalent [PR algol68/123653]   Jose E. Marchesi
• [gcc r16-6861] a68: add explicative comment to are_packs_equivalent   Jose E. Marchesi
• [gcc r16-6879] a68: new Coding Guidelines manual for Algol 68   Jose E. Marchesi
• [gcc r16-6880] a68: do not use `^' for the pow operator   Jose E. Marchesi
• [gcc r16-6908] a68: set enable_algol68_gc to `auto' instead of `no'   Jose E. Marchesi
• [gcc r16-6971] a68: fix code and phrases in documentation [PR algol68/123734]   Jose E. Marchesi
• [gcc r16-7014] a68: build a68 type nodes before targetm.init_builtins [PR algol68/123785]   Jose E. Marchesi
• [gcc r16-7015] Revert "a68: do not use `^' for the pow operator"   Jose E. Marchesi
• [gcc r16-7016] a68: document libgc minimum version and feature-check GC_is_init_called [PR algol68/123733]   Jose E. Marchesi
• [gcc r16-7129] a68: support FFI with C via formal holes   Jose E. Marchesi
• [gcc r16-7133] a68: implement GNU68-2026-001-short-of-symbol   Jose E. Marchesi
• [gcc r16-7217] a68: add SET and CLEAR operators for L bits   Jose E. Marchesi
• [gcc r16-7218] a68: add TEST operator for bits to expanded prelude   Jose E. Marchesi
• [gcc r16-6883] c++: don't crash determining linkage of invalid TYPE_DECL [PR122391]   Simon Martin
• [gcc r16-6579] MAINTAINERS: add myself to write after approval   Karl Meakin
• [gcc r16-7046] aarch64: fix XAR tests   Karl Meakin
• [gcc r16-7047] aarch64: fix `mangle_5.C` test   Karl Meakin
• [gcc r16-7048] aarch64: fix `asm.c` tests   Karl Meakin
• [gcc r16-7110] aarch64: FEAT_SVE_BFSCALE support   Karl Meakin
• [gcc] Created branch 'meissner/heads/work233' in namespace 'refs/users'   Michael Meissner
• [gcc(refs/users/meissner/heads/work233)] Add ChangeLog.meissner and REVISION.   Michael Meissner
• [gcc] Created branch 'meissner/heads/work233-orig' in namespace 'refs/users'   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-orig)] Add REVISION.   Michael Meissner
• [gcc] Created branch 'meissner/heads/work233-bugs' in namespace 'refs/users'   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-bugs)] Add ChangeLog.bugs and update REVISION.   Michael Meissner
• [gcc] Created branch 'meissner/heads/work233-dmf' in namespace 'refs/users'   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-dmf)] Add ChangeLog.dmf and update REVISION.   Michael Meissner
• [gcc] Created branch 'meissner/heads/work233-sha' in namespace 'refs/users'   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-sha)] Add ChangeLog.sha and update REVISION.   Michael Meissner
• [gcc] Created branch 'meissner/heads/work233-float' in namespace 'refs/users'   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-float)] Add ChangeLog.float and update REVISION.   Michael Meissner
• [gcc] Created branch 'meissner/heads/work233-test' in namespace 'refs/users'   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-test)] Add ChangeLog.test and update REVISION.   Michael Meissner
• [gcc] Created branch 'meissner/heads/work233-submit' in namespace 'refs/users'   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-submit)] Add ChangeLog.submit and update REVISION.   Michael Meissner
• [gcc(refs/users/meissner/heads/work233)] Add -mcpu=future.   Michael Meissner
• [gcc(refs/users/meissner/heads/work233)] Use vector pair load/store for memcpy with -mcpu=future   Michael Meissner
• [gcc(refs/users/meissner/heads/work233)] Update ChangeLog.*   Michael Meissner
• [gcc/meissner/heads/work233-bugs] (5 commits) Merge commit 'refs/users/meissner/heads/work233-bugs' of gi   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-bugs)] Add ChangeLog.bugs and update REVISION.   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-bugs)] Merge commit 'refs/users/meissner/heads/work233-bugs' of git+ssh://gcc.gnu.org/git/gcc into me/work2   Michael Meissner
• [gcc/meissner/heads/work233-dmf] (5 commits) Merge commit 'refs/users/meissner/heads/work233-dmf' of git   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-dmf)] Add ChangeLog.dmf and update REVISION.   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-dmf)] Merge commit 'refs/users/meissner/heads/work233-dmf' of git+ssh://gcc.gnu.org/git/gcc into me/work23   Michael Meissner
• [gcc/meissner/heads/work233-float] (5 commits) Merge commit 'refs/users/meissner/heads/work233-float' of g   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-float)] Add ChangeLog.float and update REVISION.   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-float)] Merge commit 'refs/users/meissner/heads/work233-float' of git+ssh://gcc.gnu.org/git/gcc into me/work   Michael Meissner
• [gcc/meissner/heads/work233-sha] (5 commits) Merge commit 'refs/users/meissner/heads/work233-sha' of git   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-sha)] Add ChangeLog.sha and update REVISION.   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-sha)] Merge commit 'refs/users/meissner/heads/work233-sha' of git+ssh://gcc.gnu.org/git/gcc into me/work23   Michael Meissner
• [gcc/meissner/heads/work233-test] (5 commits) Merge commit 'refs/users/meissner/heads/work233-test' of gi   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-test)] Add ChangeLog.test and update REVISION.   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-test)] Merge commit 'refs/users/meissner/heads/work233-test' of git+ssh://gcc.gnu.org/git/gcc into me/work2   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-dmf)] Add wD constraint.   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-dmf)] Add support for dense math registers.   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-dmf)] Add support for 1, 024 bit DMF registers.   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-dmf)] Update ChangeLog.*   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-float)] Add infrastructure for _Float16 and __bfloat16 types.   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-float)] Add initial 16-bit floating point support.   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-float)] Add HF/BF emulation functions to libgcc.   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-float)] Add conversions between _Float16 and float/double.   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-float)] Add conversions between __bfloat16 and float/double.   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-float)] Add conversions between 16-bit floating point and other scalar modes.   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-float)] Add BF/HF neg, abs operands and logical insns.   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-float)] Add 16-bit floating point vectorization.   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-float)] Optimize __bfloat16 scalar code.   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-float)] Add --with-powerpc-float16 and --with-powerpc-float16-disable-warning.   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-float)] Add _Float16 and __bfloat16 tests.   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-float)] Update ChangeLog.*   Michael Meissner
• [gcc(refs/users/meissner/heads/work233)] Update ChangeLog.*   Michael Meissner
• [gcc/meissner/heads/work233-float] (15 commits) Merge commit 'refs/users/meissner/heads/work233-float' of g   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-float)] Add ChangeLog.float and update REVISION.   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-float)] Add infrastructure for _Float16 and __bfloat16 types.   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-float)] Add initial 16-bit floating point support.   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-float)] Add HF/BF emulation functions to libgcc.   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-float)] Add conversions between _Float16 and float/double.   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-float)] Add conversions between __bfloat16 and float/double.   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-float)] Add conversions between 16-bit floating point and other scalar modes.   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-float)] Add BF/HF neg, abs operands and logical insns.   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-float)] Add 16-bit floating point vectorization.   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-float)] Optimize __bfloat16 scalar code.   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-float)] Add --with-powerpc-float16 and --with-powerpc-float16-disable-warning.   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-float)] Add _Float16 and __bfloat16 tests.   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-float)] Update ChangeLog.*   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-float)] Merge commit 'refs/users/meissner/heads/work233-float' of git+ssh://gcc.gnu.org/git/gcc into me/work   Michael Meissner
• [gcc/meissner/heads/work233-dmf] (7 commits) Merge commit 'refs/users/meissner/heads/work233-dmf' of git   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-dmf)] Add ChangeLog.dmf and update REVISION.   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-dmf)] Add wD constraint.   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-dmf)] Add support for dense math registers.   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-dmf)] Add support for 1, 024 bit DMF registers.   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-dmf)] Update ChangeLog.*   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-dmf)] Merge commit 'refs/users/meissner/heads/work233-dmf' of git+ssh://gcc.gnu.org/git/gcc into me/work23   Michael Meissner
• [gcc/meissner/heads/work233-bugs] (3 commits) Merge commit 'refs/users/meissner/heads/work233-bugs' of gi   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-bugs)] Add ChangeLog.bugs and update REVISION.   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-bugs)] Merge commit 'refs/users/meissner/heads/work233-bugs' of git+ssh://gcc.gnu.org/git/gcc into me/work2   Michael Meissner
• [gcc/meissner/heads/work233-sha] (3 commits) Merge commit 'refs/users/meissner/heads/work233-sha' of git   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-sha)] Add ChangeLog.sha and update REVISION.   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-sha)] Merge commit 'refs/users/meissner/heads/work233-sha' of git+ssh://gcc.gnu.org/git/gcc into me/work23   Michael Meissner
• [gcc/meissner/heads/work233-test] (3 commits) Merge commit 'refs/users/meissner/heads/work233-test' of gi   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-test)] Add ChangeLog.test and update REVISION.   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-test)] Merge commit 'refs/users/meissner/heads/work233-test' of git+ssh://gcc.gnu.org/git/gcc into me/work2   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-bugs)] Add power9 and power10 float to logical optimizations.   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-bugs)] PR 992493: Optimize splat of a V2DF/V2DI extract with constant element   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-bugs)] PR target/120528 -- Simplify zero extend from memory to VSX register on power10   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-bugs)] PR target/108958 -- simplify mtvsrdd to zero extend GPR DImode to VSX TImode   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-bugs)] PR target/120681 - allow -mcmodel=large with PC relative addressing   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-bugs)] Fix PR 118541, do not generate floating point cmoves for IEEE compares.   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-bugs)] Update ChangeLog.*   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-bugs)] Revert changes   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-float)] Add BF/HF neg, abs operands and logical insns.   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-float)] Update ChangeLog.*   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-float)] Revert changes   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-float)] Add infrastructure for _Float16 and __bfloat16 types.   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-float)] Add initial 16-bit floating point support.   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-float)] Add HF/BF emulation functions to libgcc.   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-float)] Add conversions between _Float16 and float/double.   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-float)] Add conversions between __bfloat16 and float/double.   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-float)] Add conversions between 16-bit floating point and other scalar modes.   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-float)] Add BF/HF neg, abs operands and logical insns.   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-float)] Add 16-bit floating point vectorization.   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-float)] Optimize __bfloat16 scalar code.   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-float)] Add --with-powerpc-float16 and --with-powerpc-float16-disable-warning.   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-float)] Add _Float16 and __bfloat16 tests.   Michael Meissner
• [gcc(refs/users/meissner/heads/work233-float)] Update ChangeLog.*   Michael Meissner
• [gcc] Created branch 'meissner/heads/work234' in namespace 'refs/users'   Michael Meissner
• [gcc] Created branch 'meissner/heads/work235' in namespace 'refs/users'   Michael Meissner
• [gcc(refs/users/meissner/heads/work235)] Add ChangeLog.meissner and REVISION.   Michael Meissner
• [gcc] Created branch 'meissner/heads/work235-orig' in namespace 'refs/users'   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-orig)] Add REVISION.   Michael Meissner
• [gcc] Created branch 'meissner/heads/work235-bugs' in namespace 'refs/users'   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-bugs)] Add ChangeLog.bugs and update REVISION.   Michael Meissner
• [gcc] Created branch 'meissner/heads/work235-dmf' in namespace 'refs/users'   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-dmf)] Add ChangeLog.dmf and update REVISION.   Michael Meissner
• [gcc] Created branch 'meissner/heads/work235-sha' in namespace 'refs/users'   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-sha)] Add ChangeLog.sha and update REVISION.   Michael Meissner
• [gcc] Created branch 'meissner/heads/work235-float' in namespace 'refs/users'   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-float)] Add ChangeLog.float and update REVISION.   Michael Meissner
• [gcc] Created branch 'meissner/heads/work235-test' in namespace 'refs/users'   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-test)] Add ChangeLog.test and update REVISION.   Michael Meissner
• [gcc] Created branch 'meissner/heads/work235-submit' in namespace 'refs/users'   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-submit)] Add ChangeLog.submit and update REVISION.   Michael Meissner
• [gcc(refs/users/meissner/heads/work235)] Add -mcpu=future.   Michael Meissner
• [gcc(refs/users/meissner/heads/work235)] Use vector pair load/store for memcpy with -mcpu=future   Michael Meissner
• [gcc(refs/users/meissner/heads/work235)] Update ChangeLog.*   Michael Meissner
• [gcc/meissner/heads/work235-bugs] (5 commits) Merge commit 'refs/users/meissner/heads/work235-bugs' of gi   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-bugs)] Add ChangeLog.bugs and update REVISION.   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-bugs)] Merge commit 'refs/users/meissner/heads/work235-bugs' of git+ssh://gcc.gnu.org/git/gcc into me/work2   Michael Meissner
• [gcc/meissner/heads/work235-dmf] (5 commits) Merge commit 'refs/users/meissner/heads/work235-dmf' of git   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-dmf)] Add ChangeLog.dmf and update REVISION.   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-dmf)] Merge commit 'refs/users/meissner/heads/work235-dmf' of git+ssh://gcc.gnu.org/git/gcc into me/work23   Michael Meissner
• [gcc/meissner/heads/work235-float] (5 commits) Merge commit 'refs/users/meissner/heads/work235-float' of g   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-float)] Add ChangeLog.float and update REVISION.   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-float)] Merge commit 'refs/users/meissner/heads/work235-float' of git+ssh://gcc.gnu.org/git/gcc into me/work   Michael Meissner
• [gcc/meissner/heads/work235-sha] (5 commits) Merge commit 'refs/users/meissner/heads/work235-sha' of git   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-sha)] Add ChangeLog.sha and update REVISION.   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-sha)] Merge commit 'refs/users/meissner/heads/work235-sha' of git+ssh://gcc.gnu.org/git/gcc into me/work23   Michael Meissner
• [gcc/meissner/heads/work235-test] (5 commits) Merge commit 'refs/users/meissner/heads/work235-test' of gi   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-test)] Add ChangeLog.test and update REVISION.   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-test)] Merge commit 'refs/users/meissner/heads/work235-test' of git+ssh://gcc.gnu.org/git/gcc into me/work2   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-dmf)] Add wD constraint.   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-dmf)] Add support for dense math registers.   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-dmf)] Add support for 1, 024 bit dense math registers.   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-dmf)] Document mma instruction names.   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-dmf)] Update ChangeLog.*   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-bugs)] Add power9 and power10 float to logical optimizations.   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-bugs)] PR 992493: Optimize splat of a V2DF/V2DI extract with constant element   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-bugs)] PR target/120528 -- Simplify zero extend from memory to VSX register on power10   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-bugs)] PR target/108958 -- simplify mtvsrdd to zero extend GPR DImode to VSX TImode   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-bugs)] PR target/120681 - allow -mcmodel=large with PC relative addressing   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-bugs)] Update ChangeLog.*   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-float)] Add infrastructure for _Float16 and __bfloat16 types.   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-float)] Add initial 16-bit floating point support.   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-float)] Add HF/BF emulation functions to libgcc.   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-float)] Add conversions between _Float16 and float/double.   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-float)] Add conversions between __bfloat16 and float/double.   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-float)] Add conversions between 16-bit floating point and other scalar modes.   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-float)] Add BF/HF neg, abs operands and logical insns.   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-float)] Add 16-bit floating point vectorization.   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-float)] Optimize __bfloat16 scalar code.   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-float)] Add --with-powerpc-float16 and --with-powerpc-float16-disable-warning.   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-float)] Add _Float16 and __bfloat16 tests.   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-float)] Update ChangeLog.*   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-sha)] PR target/117251: Improve vector and to vector and fusion   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-sha)] PR target/117251: Improve vector andc to vector and fusion   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-sha)] PR target/117251: Improve vector xor to vector and fusion   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-sha)] PR target/117251: Improve vector or to vector and fusion   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-sha)] PR target/117251: Improve vector nor to vector and fusion   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-sha)] PR target/117251: Improve vector eqv to vector and fusion   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-sha)] PR target/117251: Improve vector orc to vector and fusion   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-sha)] PR target/117251: Improve vector andc to vector andc fusion   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-sha)] PR target/117251: Improve vector nand to vector and fusion   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-sha)] PR target/117251: Improve vector nand to vector nor fusion   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-sha)] PR target/117251: Improve vector and to vector xor fusion   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-sha)] PR target/117251: Improve vector and to vector or fusion   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-sha)] PR target/117251: Improve vector andc to vector xor fusion   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-sha)] PR target/117251: Improve vector andc to vector or fusion   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-sha)] PR target/117251: Improve vector orc to vector nor fusion   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-sha)] PR target/117251: Improve vector orc to vector eqv fusion   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-sha)] PR target/117251: Improve vector orc to vector orc fusion   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-sha)] PR target/117251: Improve vector eqv to vector nor fusion   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-sha)] PR target/117251: Improve vector xor to vector xor fusion   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-sha)] PR target/117251: Improve vector xor to vector or fusion   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-sha)] PR target/117251: Improve vector nor to vector nor fusion   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-sha)] PR target/117251: Improve vector or to vector xor fusion   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-sha)] PR target/117251: Improve vector or to vector or fusion   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-sha)] PR target/117251: Improve vector or to vector nor fusion   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-sha)] PR target/117251: Improve vector nor to vector xor fusion   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-sha)] PR target/117251: Improve vector nor to vector or fusion   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-sha)] PR target/117251: Improve vector xor to vector nor fusion   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-sha)] PR target/117251: Improve vector eqv to vector xor fusion   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-sha)] PR target/117251: Improve vector eqv to vector or fusion   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-sha)] PR target/117251: Improve vector orc to vector xor fusion   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-sha)] PR target/117251: Improve vector orc to vector or fusion   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-sha)] PR target/117251: Improve vector andc to vector nor fusion   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-sha)] PR target/117251: Improve vector andc to vector eqv fusion   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-sha)] PR target/117251: Improve vector and to vector nor fusion   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-sha)] PR target/117251: Improve vector nand to vector xor fusion   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-sha)] PR target/117251: Improve vector nand to vector or fusion   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-sha)] PR target/117251: Improve vector nand to vector nand fusion   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-sha)] PR target/117251: Improve vector orc to vector nand fusion   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-sha)] PR target/117251: Improve vector eqv to vector nand fusion   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-sha)] PR target/117251: Improve vector nor to vector nand fusion   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-sha)] PR target/117251: Improve vector or to vector nand fusion   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-sha)] PR target/117251: Improve vector xor to vector nand fusion   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-sha)] PR target/117251: Improve vector andc to vector nand fusion   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-sha)] PR target/117251: Improve vector and to vector nand fusion   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-sha)] PR target/117251: Add tests   Michael Meissner
• [gcc(refs/users/meissner/heads/work235-sha)] Update ChangeLog.*   Michael Meissner
• [gcc r16-6800] ipa/122852: Don't delete unreachable callback edges.   Josef Melcr
• [gcc r15-10656] c++: xobj lambda ICE [PR121854]   Jason Merrill
• [gcc r15-10657] c++: implicit 'this' in generic lambda [PR122048]   Jason Merrill
• [gcc r15-10658] c++: Allow lambda expressions in template type parameters [PR116952]   Jason Merrill
• [gcc r16-6723] c++: more gnu_inline linkage adjustment   Jason Merrill
• [gcc r16-6724] c++: tweak testcase for --stds=impcx   Jason Merrill
• [gcc r16-6762] MAINTAINERS: update Paolo Carlini email address   Jason Merrill
• [gcc r16-7093] c++: -Wunused-value on ternary indexed by non-constant   Jason Merrill
• [gcc r16-7094] c++: Fix false positive with -Wunused [PR114450]   Jason Merrill
• [gcc r16-7095] c++/modules: Handle reflection SPLICE_SCOPE tree node   Jason Merrill
• [gcc r16-7096] c++: Error diagnostics for pointer-to-member type [PR38612]   Jason Merrill
• [gcc r16-7204] c++: defer DECL_ONE_ONLY vs consteval-only [PR122785]   Jason Merrill
• [gcc r16-6479] algol68: Improve testsuite initialization   Pietro Monteiro
• [gcc r16-6576] Containerfile for base forge actions   Pietro Monteiro
• [gcc r16-6674] a68: Add exit function to POSIX prelude   Pietro Monteiro
• [gcc r16-6698] libga68: Make it possible to debug the GC   Pietro Monteiro
• [gcc r16-6909] algol68: Add allocation function for leaf objects   Pietro Monteiro
• [gcc r16-7045] Generate Algol 68 front end Coding Guidelines   Pietro Monteiro
• [gcc r16-7130] libffi: Add missing GCC patches to LOCAL_PATCHES   Pietro Monteiro
• [gcc r16-7131] libffi: Remove more unneeded files when merging   Pietro Monteiro
• [gcc r16-7189] libga68: Use the internal malloc for UTF-32 to UTF-8 conversion   Pietro Monteiro
• [gcc r16-7202] libitm: testsuite: don't include libstdc++ paths in test names [PR69018]   Pietro Monteiro
• [gcc r16-7205] compare_tests: Don't hardcode grep -E   Pietro Monteiro
• [gcc r16-6960] [PR modula2/123739] The help option descriptions are not capitalized   Gaius Mulley
• [gcc r16-6505] Update cpplib ka.po   Joseph Myers
• [gcc r15-10651] Update cpplib ka.po   Joseph Myers
• [gcc r16-6525] testsuite: Do not restrict stack protector tests to native testing   Joseph Myers
• [gcc r16-6780] testsuite: Fix issues with cross testing in guality tests   Joseph Myers
• [gcc r16-6781] testsuite: Enable cross testing for simulate-thread tests   Joseph Myers
• [gcc r16-6904] testsuite: Do not restrict five tests to { target native }   Joseph Myers
• [gcc r16-6906] Update gcc es.po   Joseph Myers
• [gcc r15-10708] Update gcc es.po   Joseph Myers
• [gcc r16-7009] testsuite: Enable cross testing for gcov tests   Joseph Myers
• [gcc r16-7049] testsuite: Make profopt-execute also copy profile data for dg-additional-sources   Joseph Myers
• [gcc r16-7078] Update gcc sv.po   Joseph Myers
• [gcc r15-10738] Update gcc sv.po   Joseph Myers
• [gcc r16-7038] vect: Fix outer loop vectorization for nested uncounted loops [PR123657]   Victor Do Nascimento
• [gcc r16-6687] CRIS: Handle POST_INC in cris_rtx_costs   Hans-Peter Nilsson
• [gcc r16-6985] testsuite: Fix issues with simulator testing in guality, simulate-thread tests   Hans-Peter Nilsson
• [gcc r16-6584] Introduce x86_64-linux-gnuabi32   Alexandre Oliva
• [gcc/aoliva/heads/testbase] (542 commits) [AutoFDO] Walk function body to to find existing max copyid   Alexandre Oliva
• [gcc/aoliva/heads/testme] (558 commits) testsuite: arm: update fast-math-complex-mls-half-float.c   Alexandre Oliva
• [gcc(refs/users/aoliva/heads/testme)] testsuite: drop explicit run from dfp execution tests   Alexandre Oliva
• [gcc(refs/users/aoliva/heads/testme)] testsuite: require c99_runtime for ldexp optimizations   Alexandre Oliva
• [gcc(refs/users/aoliva/heads/testme)] testsuite: _Static_assert is not present in C90   Alexandre Oliva
• [gcc(refs/users/aoliva/heads/testme)] [testsuite] [aarch64] adjust auto-init-1 expectations for absent nop   Alexandre Oliva
• [gcc(refs/users/aoliva/heads/testme)] testsuite: add hostedlib requirements to multiple C++ tests   Alexandre Oliva
• [gcc(refs/users/aoliva/heads/testme)] testsuite: enable use of cxa_atexit on abi tag18a test   Alexandre Oliva
• [gcc(refs/users/aoliva/heads/testme)] testsuite: silence nolto-rel warning in pr62026_0.C   Alexandre Oliva
• [gcc(refs/users/aoliva/heads/testme)] testsuite: enable use of cxa_atexit on module pr98893 test   Alexandre Oliva
• [gcc(refs/users/aoliva/heads/testme)] testsuite: enable use of cxa_atexit on tree-ssa cxa_atexit tests   Alexandre Oliva
• [gcc(refs/users/aoliva/heads/testme)] testsuite: arm: restore defaults for multilib test   Alexandre Oliva
• [gcc(refs/users/aoliva/heads/testme)] testsuite: arm: add -mcpu=unset before -march   Alexandre Oliva
• [gcc(refs/users/aoliva/heads/testme)] testsuite: arm: crypto-vsha1*_u32 tests got late-combine improvements   Alexandre Oliva
• [gcc(refs/users/aoliva/heads/testme)] testsuite: arm: bf16_vstn_1 vst3q_bf16 improved by late-combine   Alexandre Oliva
• [gcc(refs/users/aoliva/heads/testme)] testsuite: arm: thumb2-pop-loreg needs explicit -mthumb   Alexandre Oliva
• [gcc(refs/users/aoliva/heads/testme)] testsuite: tolerate bogus warning in pr113026-1.c [PR113524]   Alexandre Oliva
• [gcc(refs/users/aoliva/heads/testme)] testsuite: arm: update fast-math-complex-mls-half-float.c   Alexandre Oliva
• [gcc/aoliva/heads/testme] (15 commits) testsuite: arm: update fast-math-complex-mls-half-float.c   Alexandre Oliva
• [gcc(refs/users/aoliva/heads/testme)] testsuite: require c99_runtime for ldexp optimizations   Alexandre Oliva
• [gcc(refs/users/aoliva/heads/testme)] testsuite: _Static_assert is not present in C90   Alexandre Oliva
• [gcc(refs/users/aoliva/heads/testme)] [testsuite] [aarch64] adjust auto-init-1 expectations for absent nop   Alexandre Oliva
• [gcc(refs/users/aoliva/heads/testme)] testsuite: add hostedlib requirements to multiple C++ tests   Alexandre Oliva
• [gcc(refs/users/aoliva/heads/testme)] testsuite: enable use of cxa_atexit on abi tag18a test   Alexandre Oliva
• [gcc(refs/users/aoliva/heads/testme)] testsuite: silence nolto-rel warning in pr62026_0.C   Alexandre Oliva
• [gcc(refs/users/aoliva/heads/testme)] testsuite: enable use of cxa_atexit on module pr98893 test   Alexandre Oliva
• [gcc(refs/users/aoliva/heads/testme)] testsuite: enable use of cxa_atexit on tree-ssa cxa_atexit tests   Alexandre Oliva
• [gcc(refs/users/aoliva/heads/testme)] testsuite: arm: restore defaults for multilib test   Alexandre Oliva
• [gcc(refs/users/aoliva/heads/testme)] testsuite: arm: add -mcpu=unset before -march   Alexandre Oliva
• [gcc(refs/users/aoliva/heads/testme)] testsuite: arm: crypto-vsha1*_u32 tests got late-combine improvements   Alexandre Oliva
• [gcc(refs/users/aoliva/heads/testme)] testsuite: arm: bf16_vstn_1 vst3q_bf16 improved by late-combine   Alexandre Oliva
• [gcc(refs/users/aoliva/heads/testme)] testsuite: arm: thumb2-pop-loreg needs explicit -mthumb   Alexandre Oliva
• [gcc(refs/users/aoliva/heads/testme)] testsuite: tolerate bogus warning in pr113026-1.c [PR113524]   Alexandre Oliva
• [gcc(refs/users/aoliva/heads/testme)] testsuite: arm: update fast-math-complex-mls-half-float.c   Alexandre Oliva
• [gcc r16-6942] testsuite: drop explicit run from dfp execution tests   Alexandre Oliva
• [gcc r16-6943] testsuite: require c99_runtime for ldexp optimizations   Alexandre Oliva
• [gcc r16-6944] testsuite: _Static_assert is not present in C90   Alexandre Oliva
• [gcc r16-6945] testsuite: add hostedlib requirements to multiple C++ tests   Alexandre Oliva
• [gcc r16-6946] testsuite: enable use of cxa_atexit on abi tag18a test   Alexandre Oliva
• [gcc r16-6947] testsuite: silence nolto-rel warning in pr62026_0.C   Alexandre Oliva
• [gcc r16-6948] testsuite: enable use of cxa_atexit on module pr98893 test   Alexandre Oliva
• [gcc r16-6949] testsuite: enable use of cxa_atexit on tree-ssa cxa_atexit tests   Alexandre Oliva
• [gcc r16-6950] testsuite: arm: bf16_vstn_1 vst3q_bf16 improved by late-combine   Alexandre Oliva
• [gcc r16-6951] testsuite: arm: thumb2-pop-loreg needs explicit -mthumb   Alexandre Oliva
• [gcc r16-6952] testsuite: tolerate bogus warning in pr113026-1.c [PR113524]   Alexandre Oliva
• [gcc r16-7207] testsuite: arm: update fast-math-complex-mls-half-float.c   Alexandre Oliva
• [gcc r16-7208] testsuite: arm: add -mcpu=unset before -march   Alexandre Oliva
• [gcc r16-7209] testsuite: arm: crypto-vsha1*_u32 tests got late-combine improvements   Alexandre Oliva
• [gcc/aoliva/heads/testbase] (361 commits) testsuite: arm: crypto-vsha1*_u32 tests got late-combine im   Alexandre Oliva
• [gcc/aoliva/heads/testme] (377 commits) testsuite: skip pr118817 over unmet hostedlib needs   Alexandre Oliva
• [gcc(refs/users/aoliva/heads/testme)] testsuite: arm: restore defaults for multilib test   Alexandre Oliva
• [gcc(refs/users/aoliva/heads/testme)] testsuite: riscv: adjust/xfail dynamic-lmul tests   Alexandre Oliva
• [gcc(refs/users/aoliva/heads/testme)] testsuite: riscv: valgrind: tolerate unhandled syscall   Alexandre Oliva
• [gcc(refs/users/aoliva/heads/testme)] testsuite: riscv: disable scheduling for rvv/autovec/bug-3.c   Alexandre Oliva
• [gcc(refs/users/aoliva/heads/testme)] testsuite: riscv: gcc-15 reorders poly_licm-1.c insns   Alexandre Oliva
• [gcc(refs/users/aoliva/heads/testme)] simplify-rtx: fix riscv redundant-bitmap-2.C   Alexandre Oliva
• [gcc(refs/users/aoliva/heads/testme)] it From: Alexandre Oliva <oliva@adacore.com>   Alexandre Oliva
• [gcc(refs/users/aoliva/heads/testme)] testsuite: riscv: set expected code model for pr113206-2.c   Alexandre Oliva
• [gcc(refs/users/aoliva/heads/testme)] testsuite: riscv: set abi along with arch word size   Alexandre Oliva
• [gcc(refs/users/aoliva/heads/testme)] testsuite: riscv: pr118170 goes 64-bit without choosing a 64-bit abi   Alexandre Oliva
• [gcc(refs/users/aoliva/heads/testme)] testsuite: riscv: pr114139 goes 64-bit without choosing a 64-bit abi   Alexandre Oliva
• [gcc(refs/users/aoliva/heads/testme)] testsuite: riscv: pr116715.c cannot run with arbitrary arch options   Alexandre Oliva
• [gcc(refs/users/aoliva/heads/testme)] testsuite: riscv: pr90838-2.c cannot find 64-bit CTZ on rv32   Alexandre Oliva
• [gcc(refs/users/aoliva/heads/testme)] testsuite: riscv: pr83403-*.c need common 32bit --param on rv32   Alexandre Oliva
• [gcc(refs/users/aoliva/heads/testme)] testsuite: riscv: pr110812_*.c needs medany on rv32   Alexandre Oliva
• [gcc(refs/users/aoliva/heads/testme)] testsuite: skip pr118817 over unmet hostedlib needs   Alexandre Oliva
• [gcc r16-6532] Allow disabling -gctf non-C warning [PR123259]   Rainer Orth
• [gcc r16-6536] fixincludes: Remove unnecessary Solaris fixes   Rainer Orth
• [gcc r16-6542] testsuite: Require vect_bool_cmp in gcc.dg/vect/vect-bool-2.c etc. [PR123200]   Rainer Orth
• [gcc r16-6543] testsuite: Require vect_hw_misalign in gcc.dg/vect/vect-71.c [PR123197]   Rainer Orth
• [gcc r16-6545] testsuite: Don't xfail gcc.dg/tree-ssa/ssa-dom-cse-2.c on 64-bit SPARC   Rainer Orth
• [gcc r16-6546] testsuite: Require vect_extract_even_odd in gcc.dg/vect/slp-19c.c   Rainer Orth
• [gcc r16-6645] testsuite: Only xfail gcc/testsuite/gcc.dg/vect/pr33804.c etc. on 32-bit SPARC [PR102954]   Rainer Orth
• [gcc r16-6703] testsuite: i386: Disable AVX512BW/DQ tests with Solaris/x86 as [PR123415]   Rainer Orth
• [gcc r16-6708] libgomp: Skip libgomp.c++/target-cdtor-2.C on Solaris [PR81337]   Rainer Orth
• [gcc r16-6797] Remove Solaris/SPARC ASM_OUTPUT_ALIGNED_COMMON [PR38118]   Rainer Orth
• [gcc r16-6798] sparc: Switch TARGET_SUN_TLS default   Rainer Orth
• [gcc r16-6799] sparc: Remove HAVE_AS_SPARC_UA_PCREL and HAVE_AS_SPARC_UA_PCREL_HIDDEN   Rainer Orth
• [gcc r16-6801] Use -m32/-m64 with Solaris/x86 as   Rainer Orth
• [gcc r16-6803] sparc: Remove TARGET_SUN_TLS   Rainer Orth
• [gcc r16-6819] Provide gt_pch_get_address etc. on FreeBSD [PR110746]   Rainer Orth
• [gcc r16-6903] Silently ignore -pthread etc. on Solaris   Rainer Orth
• [gcc r16-6905] Regenerate sol2.opt.urls etc.   Rainer Orth
• [gcc r16-7072] build: Only use --fatal-warnings if assembler supports it   Rainer Orth
• [gcc r16-7073] build: Unify 32 and 64-bit assembler handling   Rainer Orth
• [gcc r16-7074] build: Unifiy 32 and 64-bit linker options   Rainer Orth
• [gcc r16-7081] build: Fix Linux/x86 bootstrap without --with-gnu-as/--with-as [PR123841]   Rainer Orth
• [gcc r16-6725] c++: deferred noexcept parsing for friend tmpl spec [PR123189]   Patrick Palka
• [gcc r16-6938] c++: non-dep reversed <=> returning int [PR123601]   Patrick Palka
• [gcc r15-10711] c++: Fix ICE with type aliases in inherited CTAD [PR122070]   Patrick Palka
• [gcc r15-10712] c++: Fix member-like friend detection for non-template classes [PR122550]   Patrick Palka
• [gcc r16-7055] c++: leaky uid-sensitive constexpr evaluation [PR122494, PR123814]   Patrick Palka
• [gcc r16-7056] c++: non-dep decltype folding of concept-id C<Ts...> [PR123676]   Patrick Palka
• [gcc r15-10735] c++: leaky uid-sensitive constexpr evaluation [PR122494, PR123814]   Patrick Palka
• [gcc r15-10736] c++: non-dep decltype folding of concept-id C<Ts...> [PR123676]   Patrick Palka
• [gcc r14-12269] c++: leaky uid-sensitive constexpr evaluation [PR122494, PR123814]   Patrick Palka
• [gcc r14-12270] c++: non-dep decltype folding of concept-id C<Ts...> [PR123676]   Patrick Palka
• [gcc r16-7193] libstdc++/regex: Make DFS executor non-recursive [PR86164]   Patrick Palka
• [gcc r16-7194] libstdc++/regex: Defer _M_current restoration to backtracking nodes [PR86164]   Patrick Palka
• [gcc r16-7196] libstdc++/regex: add [[gnu::always_inline]] to _Executor::_M_node   Patrick Palka
• [gcc r16-7199] c++: non-empty constexpr constructor bodies in C++11 [PR123845]   Patrick Palka
• [gcc r16-7203] libstdc++/regex: Suppress -Wpedantic warning about anonymous structs   Patrick Palka
• [gcc r16-7210] doc: Switch delorie.com to https   Gerald Pfeifer
• [gcc r16-6480] testsuite: Add new variant of pr42196-3.c   Andrew Pinski
• [gcc r16-6486] testsuite: Create a variant of uninit-pred-7_a.c [PR123377]   Andrew Pinski
• [gcc r16-6491] Regenerate gcc/configure with the correct version of autoconf   Andrew Pinski
• [gcc r16-6529] Add myself as global reviewer   Andrew Pinski
• [gcc r16-6565] cse: Small boolization of follow_jumps argument to cse_find_path   Andrew Pinski
• [gcc r16-6566] vect/ifcvt: Don't factor out VEC_PERM_EXPR with constant masks [PR123382]   Andrew Pinski
• [gcc r16-6594] ifcvt: Reject inner floating modes of a subreg for noce_try_cond_zero_arith [PR123491]   Andrew Pinski
• [gcc r16-6662] aarch64: Fix PCH for sve builtins [PR123457]   Andrew Pinski
• [gcc r16-6679] cfgcleanup: Protect latches always [PR123417]   Andrew Pinski
• [gcc r16-6700] testsuite: Disable vector-compare-1.C for arm targets [PR121752]   Andrew Pinski
• [gcc r16-6727] match: Simplify `(T1)(a bit_op (T2)b)` to `((T1)a bit_op b)` When b is T1 type and truncating from T   Andrew Pinski
• [gcc r16-6733] xfail store_merging_19.c for the same reason as store_merging_18.c   Andrew Pinski
• [gcc r16-6747] ifcvt: Improve `cmp?a&b:a` to try with -1 [PR123312]   Andrew Pinski
• [gcc r16-6751] testsuite/aarch64: Fix aarch64/signbitv2sf.c [PR122522]   Andrew Pinski
• [gcc r16-6752] match: Add simplification of `(a*zero_one_valued_p) & b` if `a & b` simplifies [PR119402]   Andrew Pinski
• [gcc r16-6756] match: Remove redundant type checks from `(T1)(a bit_op (T2)b)` pattern.   Andrew Pinski
• [gcc r16-6882] phiopt: Rewrite cond_removal_in_builtin_zero_pattern canonicalization args code [PR123645]   Andrew Pinski
• [gcc r16-6965] testsuite: Add testcase for already fix bug [PR123745]   Andrew Pinski
• [gcc r16-6969] testsuite: don't test for shirnk wrapping for arm thumb1 on pr46555.c [PR123751]   Andrew Pinski
• [gcc r16-6998] gimple-fold: Fix handling of vdefs for MASK_LOAD_LANES replacement [PR123776]   Andrew Pinski
• [gcc r16-7000] slsr: Fix some undefined/overflow introducing bugs in SLSR [PR106883]   Andrew Pinski
• [gcc r16-7001] slsr: Move introduce_cast_before_cand to use gimple_convert   Andrew Pinski
• [gcc r16-7002] slsr: fix overflow from create_add_on_incoming_edge [PR106883]   Andrew Pinski
• [gcc r16-7003] slsr: Fix replace_rhs_if_not_dup and others for overflow [PR106883]   Andrew Pinski
• [gcc r16-7004] match: Fix some `(op (cnd @0 @1 @2) @3)` patterns [PR123778]   Andrew Pinski
• [gcc r16-7008] aarch64/testsuite: Fix test_frame_*.c   Andrew Pinski
• [gcc r16-7018] SLSR: Wrong type sometimes for rhs2 with pointers [PR123803]   Andrew Pinski
• [gcc r16-7050] final: Fix out of bounds access for invalid asm operands [PR123709]   Andrew Pinski
• [gcc r16-7051] slsr: Use the correct type to try to convert to for inserting on edge case [PR123820]   Andrew Pinski
• [gcc r16-7079] openmp: Fix omp for static schedule loop with pointers [PR97898]   Andrew Pinski
• [gcc r16-7100] waccess: Fix handling of extended builtin types [PR123849]   Andrew Pinski
• [gcc r16-7121] C/C++: Better notification if misused a function like macro [PR102846]   Andrew Pinski
• [gcc r16-7158] testsuite: Move pr116353.c from being x86 specific to being generic   Andrew Pinski
• [gcc r16-7160] optabs: Fix expansion of abs and neg for Float16 [PR123869]   Andrew Pinski
• [gcc r16-7166] ifcvt: Improve noce_can_force_operand in ifcvt [PR122170]   Andrew Pinski
• [gcc r16-6808] c++: C++26 Reflection [PR120775]   Marek Polacek
• [gcc r16-6820] c++/reflection: enable more testing   Marek Polacek
• [gcc r16-6849] c++/reflection: amend comment   Marek Polacek
• [gcc r16-6884] c++/reflection: use context_for_name_lookup   Marek Polacek
• [gcc r16-6885] c++: rename direct_base_parent to direct_base_derived   Marek Polacek
• [gcc r16-6886] c++/reflection: adjust error message   Marek Polacek
• [gcc r16-6924] c++: adjust visibility of _DECLs with no linkage   Marek Polacek
• [gcc r16-6935] c++/reflection: comment on TARGET_EXPR stripping   Marek Polacek
• [gcc r16-6958] c++: tighten up is_std_substitution   Marek Polacek
• [gcc r16-6959] c++: introduce maybe_get_first_fn   Marek Polacek
• [gcc r16-6981] c++: fix user_provided_p   Marek Polacek
• [gcc r16-6983] c++/reflection: refactor type_linkage_name   Marek Polacek
• [gcc r16-6984] c++/reflection: update class_members_of comment   Marek Polacek
• [gcc r16-6996] c++/reflection: use build_stub_type   Marek Polacek
• [gcc r16-7041] c++/reflection: fix fnptr extraction [PR123620]   Marek Polacek
• [gcc r16-7042] c++: tweak for cp_parser_type_id_1   Marek Polacek
• [gcc r16-7043] c++/reflection: detect more invalid splices in lambda   Marek Polacek
• [gcc r16-7140] c++/reflection: enhance splice error checking   Marek Polacek
• [gcc r16-7141] c++/reflection: add assert to eval_type_trait   Marek Polacek
• [gcc r16-7142] c++/reflection: tweak for eval_has_template_arguments   Marek Polacek
• [gcc r16-7145] c++/reflection: add fixed test [PR123871]   Marek Polacek
• [gcc r16-7190] c++/reflection: tweak eval_can_substitute   Marek Polacek
• [gcc r16-7191] c++/reflection: check TYPE_BEING_DEFINED in define_aggregate   Marek Polacek
• [gcc r16-6597] ada: Give consistent error message for invalid prefix in select component   Marc Poulhies
• [gcc r16-6598] ada: Update compiler sample output in user's guide   Marc Poulhies
• [gcc r16-6599] ada: Do not inline calls to ghost functions   Marc Poulhies
• [gcc r16-6600] ada: Make Exp_Ch9.Build_Task_Allocate_Block a function   Marc Poulhies
• [gcc r16-6601] ada: Fix premature finalization caused by predicate check on aggregate component   Marc Poulhies
• [gcc r16-6602] ada: Allow component clauses for certain record components with discriminants   Marc Poulhies
• [gcc r16-6603] ada: Find overlying with slices   Marc Poulhies
• [gcc r16-6604] ada: Fix Ultimate_Overlaid_Entity to match the SPARK RM semantics   Marc Poulhies
• [gcc r16-6605] ada: Fix fallout of recent change related to task activation   Marc Poulhies
• [gcc r16-6606] ada: Fix crash when checking ghost levels of call arguments   Marc Poulhies
• [gcc r16-6607] ada: Spurious warning on untagged record type equality   Marc Poulhies
• [gcc r16-6608] ada: Adjust SPARK RM rule numbers for new handling of Async_Writers   Marc Poulhies
• [gcc r16-6609] ada: Fix missing diagnostic with "T'Constructor" syntax   Marc Poulhies
• [gcc r16-6610] ada: Rename Find_Hook_Context function   Marc Poulhies
• [gcc r16-6611] ada: Update gnat-llvm debugging documentation   Marc Poulhies
• [gcc r16-6612] ada: Change syntax for destructors extension   Marc Poulhies
• [gcc r16-6613] ada: Move detection of anonymous access types in expansion of Old attributes   Marc Poulhies
• [gcc r16-6614] ada: Implement copy constructors   Marc Poulhies
• [gcc r16-6615] ada: Restore previous mapping for Ada to Win32 task priorities   Marc Poulhies
• [gcc r16-6616] ada: Warn on untagged record type equality under Ada 83/95 modes   Marc Poulhies
• [gcc r16-6617] ada: Change 'Size of formal unconstrained discriminated in out parameters   Marc Poulhies
• [gcc r16-6618] ada: Compiler crash on ill-formed container indexing   Marc Poulhies
• [gcc r16-6619] ada: Tech debt: clean up miscellaneous VAST issues   Marc Poulhies
• [gcc r16-6620] ada: Fix missing warning for unused use clause with use clause for child package   Marc Poulhies
• [gcc r16-6621] ada: Implement Ada.Containers.Bounded_Indefinite_Holders.   Marc Poulhies
• [gcc r16-6622] ada: new legality checks for Super and Initialize aspect specifications   Marc Poulhies
• [gcc r16-6623] ada: Implement From_Address attribute   Marc Poulhies
• [gcc r16-6624] ada: Add support for printing switches in the SARIF report   Marc Poulhies
• [gcc r16-6625] ada: Print gnat diagnostics with the gnat command   Marc Poulhies
• [gcc r16-6626] ada: Add diagnostic entry consistency checks   Marc Poulhies
• [gcc r16-6627] ada: Update -gnatwk error messages with Diagnostic_Id-s   Marc Poulhies
• [gcc r16-6628] ada: Fix parameterless constructors   Marc Poulhies
• [gcc r16-6629] ada: Set thread description on Windows   Marc Poulhies
• [gcc r16-6630] ada: Update GNAT RM after implementing Indefinite_Holders   Marc Poulhies
• [gcc r16-6631] ada: Add quickfixes for -gnawk warnings   Marc Poulhies
• [gcc r16-6632] ada: Reimplement AI12-0345, AI12-0372 and implement AI12-0402   Marc Poulhies
• [gcc r16-6633] ada: Unsigned_Base_Range aspect (part 7)   Marc Poulhies
• [gcc r16-6634] ada: Fix fallout of latest accessibility change with -gnata   Marc Poulhies
• [gcc r16-6635] ada: Ada.Containers.Bounded_Indefinite_Holders follow-up.   Marc Poulhies
• [gcc r16-6636] ada: Fix accessibility level of function calls in Ada 95   Marc Poulhies
• [gcc r16-6637] ada: Fix small oversight in accessibility change   Marc Poulhies
• [gcc r16-6638] ada: Fix crash on legality check for initialization of implicit constructor   Marc Poulhies
• [gcc r16-6639] ada: Improve fix for object with address clause and C++ constructor   Marc Poulhies
• [gcc r16-6640] ada: Move Save_Global_References_In_Aspects into sole caller   Marc Poulhies
• [gcc r16-6641] ada: Fix suboptimal copy of discriminated record to local variable   Marc Poulhies
• [gcc r16-6644] Update copyright years.   Marc Poulhies
• [gcc r16-7188] a68: Minor typo fix in doc   Marc Poulhies
• [gcc r16-6531] warn_access: Limit waccess2 to dangling pointer checks [PR 123374]   Siddhesh Poyarekar
• [gcc r16-6539] targethooks: Change SAME_FUNCTION_VERSIONS hook to support checking mergeability   Alfie Richards
• [gcc r16-6540] aarch64: Add support for fmv priority syntax.   Alfie Richards
• [gcc r16-6647] aarch64: Add support for FEAT_F8F32MM, FEAT_F8F16MM, and FEAT_SVE_F16F32MM.   Alfie Richards
• [gcc r16-6804] aarch64: Add comment explaining code layout   Alfie Richards
• [gcc r16-6926] aarch64: Update comment explaining code layout   Alfie Richards
• [gcc r16-6927] aarch64: Add aarch64 test [PR 123697]   Alfie Richards
• [gcc r16-6721] libiberty: Make `objalloc_free' `free'-like WRT null pointer   Maciej W. Rozycki
• [gcc r16-6558] LoongArch: guard SImode simple shift and arithmetic expansions with can_create_pseudo_p [PR 123320]   Xi Ruoyao
• [gcc r16-6997] sched: Make model scheduler more robust against stale live-in sets   Richard Sandiford
• [gcc r16-7019] libgcc: Use UTItype with mode(TI) for 16-byte atomics   Richard Sandiford
• [gcc r16-6467] aarch64: Define INCLUDE_ALGORITHM for std::max in sve-builtins-shape.   Iain D Sandoe
• [gcc r16-6681] Ada, Darwin: Fix bootstrap after recent warning improvements.   Iain D Sandoe
• [gcc r16-7031] c++: Do not mark STATEMENT_LISTs as visited in genericization.   Iain D Sandoe
• [gcc r16-7084] c++, contracts: Remove the abandoned C++2a implementation.   Iain D Sandoe
• [gcc r16-7085] c++, contracts: Add a contract scope per basic.scope.contract.   Iain D Sandoe
• [gcc r16-7086] c++, contracts: C++26 base implementation as per P2900R14.   Iain D Sandoe
• [gcc r16-7087] c++, contracts: Work around GCC IPA bug, PR121936 by wrapping terminate.   Iain D Sandoe
• [gcc r16-7088] c++, contracts: Apply P200R14 constification.   Iain D Sandoe
• [gcc r16-7089] libstdc++, contracts: Add base P2900R14 contracts support.   Iain D Sandoe
• [gcc r16-7090] c++, contracts: Add tests for C++26 contracts.   Iain D Sandoe
• [gcc r16-7091] c++, contracts: Allow contract checks as outlined functions.   Iain D Sandoe
• [gcc r16-7092] c++, contracts: Add caller-side contract checks, and controls.   Iain D Sandoe
• [gcc r16-7108] options: Fix a missing period on and option message.   Iain D Sandoe
• [gcc r16-6923] PR rtl-optimization/123585: ICE in vec_select simplification on x86_64.   Roger Sayle
• [gcc r16-7030] PR middle-end/122348: ICE in store_constructor from flexible array member   Roger Sayle
• [gcc r16-7157] Allow CONCATs in emit_group_load_1.   Roger Sayle
• [gcc r16-6737] openmp: Bump Version from 4.5 to 5.2 (2/4): 'libgomp.oacc-c-c++-common/vred2d-128.c' [PR123098]   Thomas Schwinge
• [gcc r16-6738] openmp: Bump Version from 4.5 to 5.2 (2/4): Some more '-Wno-deprecated-openmp'   Thomas Schwinge
• [gcc r16-6739] amdgcn: Adjust failure mode for gfx908 USM: 'libgomp.fortran/map-alloc-comp-9-usm.f90'   Thomas Schwinge
• [gcc r16-6770] libgomp: Add a few more OpenMP/USM test cases   Thomas Schwinge
• [gcc r16-6771] Fix up 'libgomp.c++/target-std__[...]-concurrent-usm.C' dynamic memory allocation   Thomas Schwinge
• [gcc r16-6772] Add 'libgomp.c++/target-std__[...]-concurrent-usm.C' test cases for C++ 'std::flat_map', 'std::flat_   Thomas Schwinge
• [gcc r16-6773] Add 'libgomp.c++/target-std__[...]-concurrent-usm.C' test cases for C++ 'std::unordered_map', 'std::   Thomas Schwinge
• [gcc r16-7117] c: Fix parser error on address space names [PR 123583]   Senthil Kumar Selvaraj
• [gcc r16-6596] c++/modules: Mark implicit using-directive for imported unnamed namespace as imported [PR123393]   Nathaniel Shead
• [gcc r16-6707] c++: Improve diagnostic for implicit conversion errors [PR115163]   Nathaniel Shead
• [gcc r16-6754] c++/modules: Update lang_decl_bool streaming   Nathaniel Shead
• [gcc r16-6755] c++: modules and coroutines   Nathaniel Shead
• [gcc r16-6853] c++/modules: Fix local type handling when not streaming function definitions [PR123627]   Nathaniel Shead
• [gcc r16-7034] c++: Fix behaviour of nested maybe_push_to_top_level [PR123663]   Nathaniel Shead
• [gcc r16-7062] c++/modules: Include instantiation origination for all name lookup [PR122609]   Nathaniel Shead
• [gcc r16-7213] c++: Fix cp_fold_non_odr_use_1 [PR123557,PR123738]   Nathaniel Shead
• [gcc r16-6760] Clarify function body mismatch   Nathan Sidwell
• [gcc r16-6932] diagnostics: Print invocation on ICE   Nathan Sidwell
• [gcc r16-6814] MIPS: Add R5900 to ISA_HAS_FMIN_FMAX.   YunQiang Su
• [gcc r16-6513] openmp: Improve Fortran Diagnostics for Linear Clause   Gio T
• [gcc r16-6514] MAINTAINERS: Add my Bugzilla Account   Gio T
• [gcc r16-6936] doc, openmp: Fix Overfull Hboxes for OpenMP Docs   Gio T
• [gcc r16-6470] Fortran: Invalid association with operator-result selector [PR123352]   Paul Thomas
• [gcc r16-6494] Fortran: ICE in type-bound function with PDT result [PR 123071]   Paul Thomas
• [gcc r16-6563] Fortran: [PDT]Fix ICE in tree check and memory leaks[PR90218, PR123071]   Paul Thomas
• [gcc r16-6735] Fortran: Check constant PDT type specification parameters [PR112460]   Paul Thomas
• [gcc r16-7214] Fortran: Introduce macros IS_PDT and IS_CLASS_PDT   Paul Thomas
• [gcc r16-6919] ipa-reorder-for-locality - Address compile time issues for locality cloning pass   Kyrylo Tkachov
• [gcc r16-6920] ipa-reorder-for-locality - Introduce C++ template heuristics   Kyrylo Tkachov
• [gcc r16-6921] aarch64: PR target/123584 - Fix expansion of SHA3 XAR with 0 amount   Kyrylo Tkachov
• [gcc r16-6922] aarch64: Adjust predicate used for SVE2 SHA3 XAR rotate amount   Kyrylo Tkachov
• [gcc r16-6993] Revert "aarch64: Adjust predicate used for SVE2 SHA3 XAR rotate amount"   Kyrylo Tkachov
• [gcc r16-6471] c: Emit -Wzero-as-null-pointer-constant for all integral types [PR117687]   Martin Uecker
• [gcc r16-6472] c: Fix construction of composite type for atomic pointers [PR121081]   Martin Uecker
• [gcc r16-6473] c: Fix ICE for invalid code with variadic and old-school prototypes [PR121507]   Martin Uecker
• [gcc r16-6676] c: Fix ignored qualifier issue for enumerations [PR123435, PR123463]   Martin Uecker
• [gcc r16-6750] c: fix checking ICE related to transparent unions and atomic [PR123309]   Martin Uecker
• [gcc r16-7107] vect: reconstruct vectype for non scalar masks   Andre Simoes Dias Vieira
• [gcc r16-6458] [PATCH] [AutoFDO/devirt] Fix ICE with duplicate speculative ID   Kugan Vivekanandarajah
• [gcc r16-6589] [PR ipa/123383][v2] ICE speculative call sequence has speculative_id 256 out of range   Kugan Vivekanandarajah
• [gcc r16-6590] [Bug gcov-profile/123019][V3] Fix Virtual SSA ICE   Kugan Vivekanandarajah
• [gcc r16-6790] [Autofdo] Add hierarchical discriminator support   Kugan Vivekanandarajah
• [gcc r16-6791] [AutoFDO] Add hierarchical discriminator for vectorizer   Kugan Vivekanandarajah
• [gcc r16-6792] [AutoFDO] Add hierarchical discriminator for loop versioning   Kugan Vivekanandarajah
• [gcc r16-6793] [Autofdo] Add hierarchical discriminator for loop unrolling   Kugan Vivekanandarajah
• [gcc r16-6848] [AutoFDO] Walk function body to to find existing max copyids per location   Kugan Vivekanandarajah
• [gcc r16-6519] testsuite: rework some vect/complex testcases   Artemiy Volkov
• [gcc r16-6553] libstdc++: Fix memory leak in std::barrier destructor [PR123378]   Jonathan Wakely
• [gcc r16-6554] libstdc++: Override detection of flockfile support in newlib [PR123406]   Jonathan Wakely
• [gcc r16-6555] libstdc++: Remove redundant return statement after static_assert(false)   Jonathan Wakely
• [gcc r16-6556] libstdc++: Fix std::basic_stringbuf::str()&& [PR123100]   Jonathan Wakely
• [gcc r16-6583] doc: Fix typo in documentation of -flang-info-module-cmi   Jonathan Wakely
• [gcc r16-6655] libstdc++: Fix C++ 11 ctype when using picolibc (blank vs space)   Jonathan Wakely
• [gcc r16-6657] libstdc++: Ensure counting_semaphore::try_acquire_for times out [PR122878]   Jonathan Wakely
• [gcc r16-6658] libstdc++: Fix proxy wait detection in atomic wait   Jonathan Wakely
• [gcc r16-6659] libstdc++: Simplify use_proxy_wait function   Jonathan Wakely
• [gcc r16-6680] libstdc++: Fix std::system_category().message(int) on mingw32 target   Jonathan Wakely
• [gcc r16-6711] libstdc++: Improve comments on __wait_args::_M_setup_proxy_wait   Jonathan Wakely
• [gcc r16-6712] libstdc++: Stop using some reserved names in src/c++20/atomic.cc   Jonathan Wakely
• [gcc r15-10716] libstdc++: Fix chrono::parse to read from wide strings [PR123147]   Jonathan Wakely
• [gcc r15-10717] libstdc++: Fix std::system_category().message(int) on mingw32 target   Jonathan Wakely
• [gcc r16-6977] Fix typo in comment in tree-vrp.cc   Jonathan Wakely
• [gcc r16-6978] libstdc++-v3: Update baseline symbols for ia64-linux   Jonathan Wakely
• [gcc r15-10718] libstdc++-v3: Update baseline symbols for ia64-linux   Jonathan Wakely
• [gcc r14-12256] libstdc++: std::atomic should use std::addressof   Jonathan Wakely
• [gcc r14-12257] libstdc++: Fix chrono::parse to read from wide strings [PR123147]   Jonathan Wakely
• [gcc r14-12260] libstdc++: Fix std::system_category().message(int) on mingw32 target   Jonathan Wakely
• [gcc r13-10049] libstdc++: std::atomic should use std::addressof   Jonathan Wakely
• [gcc r13-10050] libstdc++: Fix memory leak in PSTL TBB backend [PR117276]   Jonathan Wakely
• [gcc r14-12265] libstdc++: Fix unsigned wraparound in codecvt::do_length [PR105857]   Jonathan Wakely
• [gcc r14-12266] libstdc++: Implement <stdbit.h> for C++26 (P3370R1)   Jonathan Wakely
• [gcc r14-12267] libstdc++: Implement <stdckdint.h> for C++26 (P3370R1)   Jonathan Wakely
• [gcc r13-10054] libstdc++: Fix unsigned wraparound in codecvt::do_length [PR105857]   Jonathan Wakely
• [gcc r16-7105] libstdc++: Avoid -Wtype-limits warnings in locale/gnu/ctype_members.cc   Jonathan Wakely
• [gcc r16-7106] libstdc++: Disable false positive middle end warnings in std::shared_ptr [PR122197]   Jonathan Wakely
• [gcc r16-7114] libstdc++: Do not allow contract26.cc to build without -fcontracts   Jonathan Wakely
• [gcc r16-7115] libstdc++: Default to C++20 in src/experimental/Makefile.am   Jonathan Wakely
• [gcc r16-7137] libstdc++: Fix non-ASCII characters in <contracts> header   Jonathan Wakely
• [gcc r16-7152] libstdc++: fix a wrong export of a contracts facility in std module   Jonathan Wakely
• [gcc r16-7153] libstdc++: Fix use of feature test macro in <source_location>   Jonathan Wakely
• [gcc r16-7159] libstdc++: Make std::expected trivially copy/move assignable (LWG 4026)   Jonathan Wakely
• [gcc r15-10721] x86: Disable tight loop alignment for m_CORE_ATOM   Hongyu Wang
• [gcc r16-6987] [APX] i386: Fix illegal broadcast instruction generated by intrinsic   Hongyu Wang
• [gcc r15-10722] [APX] i386: Fix illegal broadcast instruction generated by intrinsic   Hongyu Wang
• [gcc r14-12259] [APX] i386: Fix illegal broadcast instruction generated by intrinsic   Hongyu Wang
• [gcc r16-7098] i386: Drop mask subst for define_insn_and_split of extend [PR123779]   Hongyu Wang
• [gcc r16-6745] winnt-utf8.manifest: Use XML example from Microsoft   Jonathan Yong
• [gcc r16-6746] winnt-utf8.manifest: make long path aware   Jonathan Yong
• [gcc r16-6807] Remove .res specs to fix COFF passthrough [PR123504]   Jonathan Yong
• [gcc r14-12245] Allow a PCH to be mapped to a different address   Jonathan Yong
• [gcc r13-10039] Allow a PCH to be mapped to a different address   Jonathan Yong
• [gcc r16-6585] __builtin_counted_by_ref should be extended to support pointers after the counted_by attribute is ex   Qing Zhao
• [gcc r16-6784] C: fix issues when supporting counted_by fields in anonymous structure/unions [PR122495, PR122496]   Qing Zhao
• [gcc r16-7077] C: Do not warn for calls to .ACCESS_WITH_SIZE when -Wbad-function-cast is specified [PR123500]   Qing Zhao
• [gcc r16-6753] match: (X >> C) NE/EQ 0 -> X LT/GE 0 [PR123109]   Pengxuan Zheng
• [gcc r16-6812] testsuite: Require target x86_64 and aarch64 for gcc.dg/pr123109.c   Pengxuan Zheng