[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Update tt-ascalon-d8's extension list [PR123492]

[Jeff Law]

https://gcc.gnu.org/g:36311c4ef181680da74893d26c7bb4e5e4e92ef6

commit 36311c4ef181680da74893d26c7bb4e5e4e92ef6
Author: Peter Bergner <bergner@tenstorrent.com>
Date:   Thu Jan 8 20:41:20 2026 -0600

    RISC-V: Update tt-ascalon-d8's extension list [PR123492]
    
    The Ascalon core implements the full RVA23 profile plus a few other optional
    extensions.  However, the -mcpu=tt-ascalon-d8 option doesn't enable them all.
    Add the missing extensions.
    
    2026-01-08  Peter Bergner  <bergner@tenstorrent.com>
    
    gcc/
            PR target/123492
            * config/riscv/riscv-cores.def (RISCV_CORE)<tt-ascalon-d8>: Add missing
            extensions via use of rva23s64 profile and adding zkr, smaia, smmpm,
            smnpm, smrnmi, smstateen, ssaia, ssstrict, svadu.
    
    Signed-off-by: Peter Bergner <bergner@tenstorrent.com>
    (cherry picked from commit b8634a0b929cdd6b37275828d6a9fd390b5900c7)

Diff:
---
 gcc/config/riscv/riscv-cores.def | 8 +++-----
 1 file changed, 3 insertions(+), 5 deletions(-)

diff --git a/gcc/config/riscv/riscv-cores.def b/gcc/config/riscv/riscv-cores.def
index 7266b5eac113..d43e370eb77c 100644
--- a/gcc/config/riscv/riscv-cores.def
+++ b/gcc/config/riscv/riscv-cores.def
@@ -148,11 +148,9 @@ RISCV_CORE("xt-c920v2",       "rv64imafdcv_zicbom_zicbop_zicboz_zicntr_zicond_"
 			      "xtheadsync",
 			       "xt-c920v2")
 
-RISCV_CORE("tt-ascalon-d8",   "rv64imafdcv_zic64b_zicbom_zicbop_zicboz_"
-			      "ziccamoa_ziccif_zicclsm_ziccrse_zicond_zicsr_"
-			      "zifencei_zihintntl_zihintpause_zimop_za64rs_"
-			      "zawrs_zfa_zfbfmin_zfh_zcb_zcmop_zba_zbb_zbs_"
-			      "zvbb_zvbc_zvfbfwma_zvfh_zvkng_zvl256b",
+RISCV_CORE("tt-ascalon-d8",   "rva23s64_zfbfmin_zfh_zkr_zvbc_zvfbfwma_zvfh_"
+			      "zvkng_zvl256b_smaia_smmpm_smnpm_smrnmi_"
+			      "smstateen_ssaia_ssstrict_svadu",
 			      "tt-ascalon-d8")
 
 RISCV_CORE("xiangshan-nanhu",      "rv64imafdc_zba_zbb_zbc_zbs_"