[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcases for signed scalar SAT_ADD IMM form 2

Jeff Law law@gcc.gnu.org
Sat Jan 17 07:04:10 GMT 2026


https://gcc.gnu.org/g:724ea374a97de245cdb40e62f9a3703da9845935

commit 724ea374a97de245cdb40e62f9a3703da9845935
Author: panciyan <panciyan@eswincomputing.com>
Date:   Tue Jun 24 09:58:14 2025 +0800

    RISC-V: Add testcases for signed scalar SAT_ADD IMM form 2
    
    This patch adds testcase for form2, as shown below:
    
    T __attribute__((noinline))                                  \
    sat_s_add_imm_##T##_fmt_2##_##INDEX (T x)                    \
    {                                                            \
      T sum = (T)((UT)x + (UT)IMM);                                   \
      return ((x ^ sum) < 0 && (x ^ IMM) >= 0) ?                 \
        (-(T)(x < 0) ^ MAX) : sum;                         \
    }
    
    Passed the rv64gcv regression test.
    
    Signed-off-by: Ciyan Pan <panciyan@eswincomputing.com>
    gcc/testsuite/ChangeLog:
    
            * gcc.target/riscv/sat/sat_arith.h: Add signed scalar SAT_ADD IMM form2.
            * gcc.target/riscv/sat/sat_s_add_imm-2-i16.c: New test.
            * gcc.target/riscv/sat/sat_s_add_imm-2-i32.c: New test.
            * gcc.target/riscv/sat/sat_s_add_imm-2-i64.c: New test.
            * gcc.target/riscv/sat/sat_s_add_imm-2-i8.c: New test.
            * gcc.target/riscv/sat/sat_s_add_imm-run-2-i16.c: New test.
            * gcc.target/riscv/sat/sat_s_add_imm-run-2-i32.c: New test.
            * gcc.target/riscv/sat/sat_s_add_imm-run-2-i64.c: New test.
            * gcc.target/riscv/sat/sat_s_add_imm-run-2-i8.c: New test.
            * gcc.target/riscv/sat/sat_s_add_imm_type_check-2-i16.c: New test.
            * gcc.target/riscv/sat/sat_s_add_imm_type_check-2-i32.c: New test.
            * gcc.target/riscv/sat/sat_s_add_imm_type_check-2-i8.c: New test.
    
    (cherry picked from commit d6ed12ed5ebac8e50da9defea6af832039782cbf)

Diff:
---
 gcc/testsuite/gcc.target/riscv/sat/sat_arith.h     | 12 +++++
 .../gcc.target/riscv/sat/sat_s_add_imm-2-i16.c     | 57 ++++++++++++++++++++++
 .../gcc.target/riscv/sat/sat_s_add_imm-2-i32.c     | 54 ++++++++++++++++++++
 .../gcc.target/riscv/sat/sat_s_add_imm-2-i64.c     | 48 ++++++++++++++++++
 .../gcc.target/riscv/sat/sat_s_add_imm-2-i8.c      | 49 +++++++++++++++++++
 .../gcc.target/riscv/sat/sat_s_add_imm-run-2-i16.c | 48 ++++++++++++++++++
 .../gcc.target/riscv/sat/sat_s_add_imm-run-2-i32.c | 48 ++++++++++++++++++
 .../gcc.target/riscv/sat/sat_s_add_imm-run-2-i64.c | 48 ++++++++++++++++++
 .../gcc.target/riscv/sat/sat_s_add_imm-run-2-i8.c  | 49 +++++++++++++++++++
 .../riscv/sat/sat_s_add_imm_type_check-2-i16.c     |  9 ++++
 .../riscv/sat/sat_s_add_imm_type_check-2-i32.c     |  9 ++++
 .../riscv/sat/sat_s_add_imm_type_check-2-i8.c      |  9 ++++
 12 files changed, 440 insertions(+)

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h b/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h
index 6e97cae96e6e..84f013ffa95e 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h
@@ -227,6 +227,18 @@ sat_s_add_imm_##T##_fmt_1##_##INDEX (T x)             \
 #define RUN_SAT_S_ADD_IMM_FMT_1(INDEX, T, x, expect) \
   if (sat_s_add_imm##_##T##_fmt_1##_##INDEX(x) != expect) __builtin_abort ()
 
+#define DEF_SAT_S_ADD_IMM_FMT_2(INDEX, T, UT, IMM, MIN, MAX) \
+T __attribute__((noinline))                                  \
+sat_s_add_imm_##T##_fmt_2##_##INDEX (T x)                    \
+{                                                            \
+  T sum = (T)((UT)x + (UT)IMM);                                   \
+  return ((x ^ sum) < 0 && (x ^ IMM) >= 0) ?                 \
+    (-(T)(x < 0) ^ MAX) : sum;                         \
+}
+
+#define RUN_SAT_S_ADD_IMM_FMT_2(INDEX, T, x, expect) \
+  if (sat_s_add_imm##_##T##_fmt_2##_##INDEX(x) != expect) __builtin_abort ()
+
 /******************************************************************************/
 /* Saturation Sub (Unsigned and Signed)                                       */
 /******************************************************************************/
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i16.c
new file mode 100644
index 000000000000..14c5d511aabb
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i16.c
@@ -0,0 +1,57 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include "sat_arith.h"
+
+/*
+** sat_s_add_imm_int16_t_fmt_2_0:
+**	addi\s+[atx][0-9]+,\s*a0,\s*-7
+**	xori\s+[atx][0-9]+,\s*a0,\s*-7
+**	xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
+**	srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15
+**	srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15
+**	xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
+**	and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+**	andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
+**	srai\s+a0,\s*a0,\s*63
+**	li\s+[atx][0-9]+,\s*32768
+**	addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
+**	xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
+**	neg\s+a0,\s*[atx][0-9]+
+**	and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
+**	addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
+**	and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
+**	or\s+a0,\s*a0,\s*[atx][0-9]+
+**	slliw\s+a0,\s*a0,\s*16
+**	sraiw\s+a0,\s*a0,\s*16
+**	ret
+*/
+DEF_SAT_S_ADD_IMM_FMT_2(0, int16_t, uint16_t, -7, INT16_MIN, INT16_MAX)
+
+/*
+** sat_s_add_imm_int16_t_fmt_2_1:
+** 	addi\s+[atx][0-9]+,\s*a0,\s*-1
+** 	not\s+[atx][0-9]+,\s*a0
+** 	xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
+** 	srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15
+** 	srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15
+** 	xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
+** 	and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+** 	andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
+** 	srai\s+a0,\s*a0,\s*63
+** 	li\s+[atx][0-9]+,\s*32768
+** 	addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
+** 	xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
+** 	neg\s+a0,\s*[atx][0-9]+
+** 	and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
+** 	addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
+** 	and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
+** 	or\s+a0,\s*a0,\s*[atx][0-9]+
+** 	slliw\s+a0,\s*a0,\s*16
+** 	sraiw\s+a0,\s*a0,\s*16
+** 	ret
+*/
+DEF_SAT_S_ADD_IMM_FMT_2(1, int16_t, uint16_t, -1, INT16_MIN, INT16_MAX)
+
+/* { dg-final { scan-tree-dump-times ".SAT_ADD " 2 "optimized" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i32.c
new file mode 100644
index 000000000000..ecd757d903f0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i32.c
@@ -0,0 +1,54 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include "sat_arith.h"
+
+/*
+** sat_s_add_imm_int32_t_fmt_2_0:
+**	addi\s+[atx][0-9]+,\s*a0,\s*10
+**	xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
+**	srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31
+**	srli\s+[atx][0-9]+,\s*a0,\s*31
+**	xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
+**	and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+**	andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
+**	srai\s+a0,\s*a0,\s*63
+**	li\s+[atx][0-9]+,\s*-2147483648
+**	xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
+**	xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
+**	neg\s+a0,\s*[atx][0-9]+
+**	and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
+**	addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
+**	and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
+**	or\s+a0,a0,\s*[atx][0-9]+
+**	sext.w\s+a0,\s*a0
+**	ret
+*/
+DEF_SAT_S_ADD_IMM_FMT_2(0, int32_t, uint32_t, 10, INT32_MIN, INT32_MAX)
+
+/*
+** sat_s_add_imm_int32_t_fmt_2_1:
+**	addi\s+[atx][0-9]+,\s*a0,\s*-1
+**	not\s+[atx][0-9]+,\s*a0
+**	xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
+**	srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31
+**	srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31
+**	xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
+**	and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+**	andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
+**	srai\s+a0,\s*a0,\s*63
+**	li\s+[atx][0-9]+,\s*-2147483648
+**	xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
+**	xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
+**	neg\s+a0,\s*[atx][0-9]+
+**	and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
+**	addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
+**	and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
+**	or\s+a0,\s*a0,\s*[atx][0-9]+
+**	sext.w\s+a0,\s*a0
+**	ret
+*/
+DEF_SAT_S_ADD_IMM_FMT_2(1, int32_t, uint32_t, -1, INT32_MIN, INT32_MAX)
+
+/* { dg-final { scan-tree-dump-times ".SAT_ADD " 2 "optimized" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i64.c
new file mode 100644
index 000000000000..07d798f7fd00
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i64.c
@@ -0,0 +1,48 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include "sat_arith.h"
+
+/*
+** sat_s_add_imm_int64_t_fmt_2_0:
+**	addi\s+[atx][0-9]+,\s*a0,\s*10
+**	xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
+**	srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
+**	srli\s+[atx][0-9]+,\s*a0,\s*63
+**	xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
+**	and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+**	srai\s+[atx][0-9]+,\s*a0,\s*63
+**	li\s+[atx][0-9]+,\s*-1
+**	srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
+**	xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+**	neg\s+[atx][0-9]+,\s*[atx][0-9]+
+**	and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+**	addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
+**	and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
+**	or\s+a0,\s*a0,\s*[atx][0-9]+
+**	ret
+*/
+DEF_SAT_S_ADD_IMM_FMT_2(0, int64_t, uint64_t, 10, INT64_MIN, INT64_MAX)
+
+/*
+** sat_s_add_imm_int64_t_fmt_2_1:
+**	addi\s+[atx][0-9]+,\s*a0,\s*-1
+**	xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
+**	srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
+**	slti\s+[atx][0-9]+,\s*a0,\s*0
+**	and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+**	srai\s+[atx][0-9]+,\s*a0,\s*63
+**	li\s+[atx][0-9]+,\s*-1
+**	srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
+**	xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+**	neg\s+[atx][0-9]+,\s*[atx][0-9]+
+**	and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+**	addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
+**	and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
+**	or\s+a0,\s*a0,\s*[atx][0-9]+
+**	ret
+*/
+DEF_SAT_S_ADD_IMM_FMT_2(1, int64_t, uint64_t, -1, INT64_MIN, INT64_MAX)
+
+/* { dg-final { scan-tree-dump-times ".SAT_ADD " 2 "optimized" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i8.c
new file mode 100644
index 000000000000..273421194232
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i8.c
@@ -0,0 +1,49 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include "sat_arith.h"
+
+/*
+** sat_s_add_imm_int8_t_fmt_2_0:
+**	addi\s+[atx][0-9]+,\s*a0,\s*9
+**	xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
+**	srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*7
+**	srli\s+[atx][0-9]+,\s*a0,\s*7
+**	xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
+**	and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+**	andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
+**	srai\s+a0,\s*a0,\s*63
+**	xori\s+[atx][0-9]+,\s*a0,\s*127
+**	neg\s+a0,\s*[atx][0-9]+
+**	and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
+**	addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
+**	and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
+**	or\s+a0,\s*a0,\s*[atx][0-9]+
+**	slliw\s+a0,\s*a0,\s*24
+**	sraiw\s+a0,\s*a0,\s*24
+**	ret
+*/
+DEF_SAT_S_ADD_IMM_FMT_2(0, int8_t, uint8_t, 9, INT8_MIN, INT8_MAX)
+
+/*
+** sat_s_add_imm_int8_t_fmt_2_1:
+**      addi\s+[atx][0-9]+,\s*a0,\s*-1
+**      xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
+**      srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*7
+**      srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
+**      and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+**      srai\s+a0,\s*a0,\s*63
+**      xori\s+[atx][0-9]+,\s*a0,\s*127
+**      neg\s+a0,\s*a4
+**      and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
+**      addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
+**      and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
+**      or\s+a0,\s*a0,\s*[atx][0-9]+
+**      slliw\s+a0,\s*a0,\s*24
+**      sraiw\s+a0,\s*a0,\s*24
+**      ret
+*/
+DEF_SAT_S_ADD_IMM_FMT_2(1, int8_t, uint8_t, -1, INT8_MIN, INT8_MAX)
+
+/* { dg-final { scan-tree-dump-times ".SAT_ADD " 2 "optimized" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-run-2-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-run-2-i16.c
new file mode 100644
index 000000000000..4f24624eb196
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-run-2-i16.c
@@ -0,0 +1,48 @@
+/* { dg-do run } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "sat_arith.h"
+
+DEF_SAT_S_ADD_IMM_FMT_2(0, int16_t, uint16_t, -32768, INT16_MIN, INT16_MAX)
+DEF_SAT_S_ADD_IMM_FMT_2(1, int16_t, uint16_t, 32767, INT16_MIN, INT16_MAX)
+DEF_SAT_S_ADD_IMM_FMT_2(2, int16_t, uint16_t, 100, INT16_MIN, INT16_MAX)
+DEF_SAT_S_ADD_IMM_FMT_2(3, int16_t, uint16_t, -100, INT16_MIN, INT16_MAX)
+DEF_SAT_S_ADD_IMM_FMT_2(4, int16_t, uint16_t, -1, INT16_MIN, INT16_MAX)
+
+#define T                       int16_t
+#define RUN(INDEX,T, x, expect) RUN_SAT_S_ADD_IMM_FMT_2(INDEX, T, x, expect)
+
+T d[][2] = {
+  /* arg_0,   expect */
+  {     -1,     -32768, },
+  {      2,     -32766, },
+  {      1,      32767, },
+  {    -10,      32757, },
+  {  32669,      32767, },
+  { -32768,     -32668, },
+  { -32768,     -32768, },
+  {      0,       -100, },
+  { -32768,     -32768, },
+  {      0,         -1, },
+};
+
+int
+main ()
+{
+  RUN (0, T, d[0][0], d[0][1]);
+  RUN (0, T, d[1][0], d[1][1]);
+
+  RUN (1, T, d[2][0], d[2][1]);
+  RUN (1, T, d[3][0], d[3][1]);
+
+  RUN (2, T, d[4][0], d[4][1]);
+  RUN (2, T, d[5][0], d[5][1]);
+
+  RUN (3, T, d[6][0], d[6][1]);
+  RUN (3, T, d[7][0], d[7][1]);
+
+  RUN (4, T, d[8][0], d[8][1]);
+  RUN (4, T, d[9][0], d[9][1]);
+
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-run-2-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-run-2-i32.c
new file mode 100644
index 000000000000..8d9ddebfa906
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-run-2-i32.c
@@ -0,0 +1,48 @@
+/* { dg-do run } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "sat_arith.h"
+
+DEF_SAT_S_ADD_IMM_FMT_2(0, int32_t, uint32_t, -2147483648, INT32_MIN, INT32_MAX)
+DEF_SAT_S_ADD_IMM_FMT_2(1, int32_t, uint32_t, 2147483647, INT32_MIN, INT32_MAX)
+DEF_SAT_S_ADD_IMM_FMT_2(2, int32_t, uint32_t, 100, INT32_MIN, INT32_MAX)
+DEF_SAT_S_ADD_IMM_FMT_2(3, int32_t, uint32_t, -100, INT32_MIN, INT32_MAX)
+DEF_SAT_S_ADD_IMM_FMT_2(4, int32_t, uint32_t, -1, INT32_MIN, INT32_MAX)
+
+#define T                       int32_t
+#define RUN(INDEX,T, x, expect) RUN_SAT_S_ADD_IMM_FMT_2(INDEX, T, x, expect)
+
+T d[][2] = {
+  /* arg_0,   expect */
+  {     -1,     -2147483648, },
+  {      2,     -2147483646, },
+  {      1,      2147483647, },
+  {    -10,      2147483637, },
+  {    300,             400, },
+  {   -300,            -200, },
+  {    100,               0, },
+  {      0,            -100, },
+  {    100,              99, },
+  {      0,              -1, },
+};
+
+int
+main ()
+{
+  RUN (0, T, d[0][0], d[0][1]);
+  RUN (0, T, d[1][0], d[1][1]);
+
+  RUN (1, T, d[2][0], d[2][1]);
+  RUN (1, T, d[3][0], d[3][1]);
+
+  RUN (2, T, d[4][0], d[4][1]);
+  RUN (2, T, d[5][0], d[5][1]);
+
+  RUN (3, T, d[6][0], d[6][1]);
+  RUN (3, T, d[7][0], d[7][1]);
+
+  RUN (4, T, d[8][0], d[8][1]);
+  RUN (4, T, d[9][0], d[9][1]);
+
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-run-2-i64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-run-2-i64.c
new file mode 100644
index 000000000000..4523f9a86432
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-run-2-i64.c
@@ -0,0 +1,48 @@
+/* { dg-do run } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "sat_arith.h"
+
+DEF_SAT_S_ADD_IMM_FMT_2(0, int64_t, uint64_t, (-9223372036854775807ll - 1), INT64_MIN, INT64_MAX)
+DEF_SAT_S_ADD_IMM_FMT_2(1, int64_t, uint64_t, 9223372036854775807ll, INT64_MIN, INT64_MAX)
+DEF_SAT_S_ADD_IMM_FMT_2(2, int64_t, uint64_t, 100, INT64_MIN, INT64_MAX)
+DEF_SAT_S_ADD_IMM_FMT_2(3, int64_t, uint64_t, -100, INT64_MIN, INT64_MAX)
+DEF_SAT_S_ADD_IMM_FMT_2(4, int64_t, uint64_t, -1, INT64_MIN, INT64_MAX)
+
+#define T                       int64_t
+#define RUN(INDEX,T, x, expect) RUN_SAT_S_ADD_IMM_FMT_2(INDEX, T, x, expect)
+
+T d[][2] = {
+  /* arg_0,   expect */
+  {     -1,     (-9223372036854775807ll - 1), },
+  {      2,           -9223372036854775806ll, },
+  {      1,            9223372036854775807ll, },
+  {     -7,            9223372036854775800ll, },
+  {      0,                              100, },
+  {     -1,                               99, },
+  {      0,                             -100, },
+  {    100,                                0, },
+  {      0,                               -1, },
+  {    100,                               99, },
+};
+
+int
+main ()
+{
+  RUN (0, T, d[0][0], d[0][1]);
+  RUN (0, T, d[1][0], d[1][1]);
+
+  RUN (1, T, d[2][0], d[2][1]);
+  RUN (1, T, d[3][0], d[3][1]);
+
+  RUN (2, T, d[4][0], d[4][1]);
+  RUN (2, T, d[5][0], d[5][1]);
+
+  RUN (3, T, d[6][0], d[6][1]);
+  RUN (3, T, d[7][0], d[7][1]);
+
+  RUN (4, T, d[8][0], d[8][1]);
+  RUN (4, T, d[9][0], d[9][1]);
+
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-run-2-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-run-2-i8.c
new file mode 100644
index 000000000000..96445aee3eb7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-run-2-i8.c
@@ -0,0 +1,49 @@
+/* { dg-do run } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "sat_arith.h"
+
+DEF_SAT_S_ADD_IMM_FMT_2(0, int8_t, uint8_t, -128, INT8_MIN, INT8_MAX)
+DEF_SAT_S_ADD_IMM_FMT_2(1, int8_t, uint8_t, 127, INT8_MIN, INT8_MAX)
+DEF_SAT_S_ADD_IMM_FMT_2(2, int8_t, uint8_t, 6, INT8_MIN, INT8_MAX)
+DEF_SAT_S_ADD_IMM_FMT_2(3, int8_t, uint8_t, -6, INT8_MIN, INT8_MAX)
+DEF_SAT_S_ADD_IMM_FMT_2(4, int8_t, uint8_t, -1, INT8_MIN, INT8_MAX)
+
+#define T                       int8_t
+#define RUN(INDEX,T, x, expect) RUN_SAT_S_ADD_IMM_FMT_2(INDEX, T, x, expect)
+
+T d[][2] = {
+  /* arg_0,   expect */
+  {     -1,     -128, },
+  {      2,     -126, },
+  {      1,      127, },
+  {    -10,      117, },
+  {    122,      127, },
+  {    -10,       -4, },
+  {   -128,     -128, },
+  {    127,      121, },
+  {   -128,     -128, },
+  {    1,          0, },
+};
+
+int
+main ()
+{
+  RUN (0, T, d[0][0], d[0][1]);
+  RUN (0, T, d[1][0], d[1][1]);
+
+  RUN (1, T, d[2][0], d[2][1]);
+  RUN (1, T, d[3][0], d[3][1]);
+
+  RUN (2, T, d[4][0], d[4][1]);
+  RUN (2, T, d[5][0], d[5][1]);
+
+  RUN (3, T, d[6][0], d[6][1]);
+  RUN (3, T, d[7][0], d[7][1]);
+
+  RUN (4, T, d[8][0], d[8][1]);
+  RUN (4, T, d[9][0], d[9][1]);
+
+  return 0;
+}
+
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm_type_check-2-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm_type_check-2-i16.c
new file mode 100644
index 000000000000..a73a77fafd74
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm_type_check-2-i16.c
@@ -0,0 +1,9 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
+
+#include "sat_arith.h"
+
+DEF_SAT_S_ADD_IMM_FMT_2(0, int16_t, uint16_t, -32769, INT16_MIN, INT16_MAX)
+DEF_SAT_S_ADD_IMM_FMT_2(1, int16_t, uint16_t, 32768, INT16_MIN, INT16_MAX)
+
+/* { dg-final { scan-tree-dump-not ".SAT_ADD " "optimized" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm_type_check-2-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm_type_check-2-i32.c
new file mode 100644
index 000000000000..9dae4254d317
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm_type_check-2-i32.c
@@ -0,0 +1,9 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
+
+#include "sat_arith.h"
+
+DEF_SAT_S_ADD_IMM_FMT_1(0, int32_t, uint32_t, -2147483649, INT32_MIN, INT32_MAX)
+DEF_SAT_S_ADD_IMM_FMT_1(1, int32_t, uint32_t, 2147483648, INT32_MIN, INT32_MAX)
+
+/* { dg-final { scan-tree-dump-not ".SAT_ADD " "optimized" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm_type_check-2-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm_type_check-2-i8.c
new file mode 100644
index 000000000000..a9cd4b9cd20b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm_type_check-2-i8.c
@@ -0,0 +1,9 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
+
+#include "sat_arith.h"
+
+DEF_SAT_S_ADD_IMM_FMT_2(0, int8_t, uint8_t, -129, INT8_MIN, INT8_MAX)
+DEF_SAT_S_ADD_IMM_FMT_2(1, int8_t, uint8_t, 128, INT8_MIN, INT8_MAX)
+
+/* { dg-final { scan-tree-dump-not ".SAT_ADD " "optimized" } } */


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