[Bug target/116149] RISC-V: Miscompile at -O3 with zvl256b -mrvv-vector-bits=zvl

rdapp at gcc dot gnu.org gcc-bugzilla@gcc.gnu.org
Wed Jul 31 13:40:59 GMT 2024


https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116149

--- Comment #2 from Robin Dapp <rdapp at gcc dot gnu.org> ---
Correction, it's actually just the wx adds with a length of 1 and those should
be "tu".  Quite likely this only got exposed recently with the late-combine
change in place.


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