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On 2020-02-09 19:02, Segher Boessenkool wrote:
On Sun, Feb 09, 2020 at 12:15:03PM +0100, m wrote:On 2020-02-07 16:44, Segher Boessenkool wrote:(define_insn "smulhshi3" [(set (match_operand:HI 0 "register_operand" "=r") (truncate:HI (ashiftrt:SI (mult:SI (sign_extend:SI (match_operand:HI 1 "register_operand" "r")) (sign_extend:SI (match_operand:HI 2 "register_operand" "r"))) (const_int 15))))] "TARGET_PACKED_OPS" "mulq.h\\t%0, %1, %2") However, I am unable to trigger this code path. I have tried with the following C code: short mulq(short op1, short op2) { return (short) (((int) op1 * (int) op2) >> (32 / 2 - 1)); } But I just get the regular 4-instruction result (2x sign extend, 1x mul, 1x shift).What does -fdump-rtl-combine-all show it tried? *Did* it try anything?Cool option. I'm not really sure how to read the output tough. The closest it seems to try to match is this:For every combination tried, it shows "Trying 2 -> 6:" etc., followed by the instructions it started with (which is very important), and then what worked and what didn't, and more debug information. I usually need to see that whole block (everything until the next "Trying:").
I've attached the full output of -fdump-rtl-combine-all.
Failed to match this instruction: (set (reg:SI 85) (ashiftrt:SI (mult:SI (sign_extend:SI (subreg:HI (reg:SI 86) 0)) (reg:SI 83 [ op2D.1381 ])) (const_int 15 [0xf]))) It seems that it has already decided to split the instruction into several operations (the truncate operation is not there, and the second sign_extend:SI (subreg:HI ...) is also missing).The code probably sign-extends the result; I need to see the full thing to really know. Similarly, the sign_extend of a const_int is not canonical rtl, it always is written as just a const_int. You'll probably need to write a few extra patterns to recognise all the options here.
I haven't had much time to dig more into this, but I hope to do so soon. Regards, Marcus
Attachment:
mulq.c.267r.combine
Description: Text document
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