Re: Matching and testing against smulhsm3

[m <m at bitsnbites dot eu>]

On 2020-02-07 16:44, Segher Boessenkool wrote:
> Hi!
>
> On Fri, Feb 07, 2020 at 03:41:25PM +0100, m wrote:
> > ...so I tried to write a corresponding matching pattern, like so:
> >
> >    (define_insn "smulhshi3"
> >      [(set (match_operand:HI 0 "register_operand" "=r")
> >        (truncate:HI
> >          (ashiftrt:SI
> >            (mult:SI
> >              (sign_extend:SI (match_operand:HI 1
> > "register_operand" "r"))
> >              (sign_extend:SI (match_operand:HI 2
> > "register_operand" "r")))
> >            (const_int 15))))]
> >    "TARGET_PACKED_OPS"
> >    "mulq.h\\t%0, %1, %2")
> >
> > However, I am unable to trigger this code path. I have tried with the
> > following C code:
> >
> > short mulq(short op1, short op2) {
> >    return (short) (((int) op1 * (int) op2) >> (32 / 2 - 1));
> > }
> >
> > But I just get the regular 4-instruction result (2x sign extend, 1x mul,
> > 1x shift).
> What does -fdump-rtl-combine-all show it tried?  *Did* it try anything?
>
>
> Segher


Cool option. I'm not really sure how to read the output tough. The 
closest it seems to try to match is this:


Failed to match this instruction:
(set (reg:SI 85)
    (ashiftrt:SI (mult:SI (sign_extend:SI (subreg:HI (reg:SI 86) 0))
            (reg:SI 83 [ op2D.1381 ]))
        (const_int 15 [0xf])))


It seems that it has already decided to split the instruction into 
several operations (the truncate operation is not there, and the second 
sign_extend:SI (subreg:HI ...) is also missing).


/Marcus