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Porting new target architecture to GCC
- From: Ben Morgan <benm dot morgan at gmail dot com>
- To: gcc at gcc dot gnu dot org
- Date: Wed, 02 May 2012 13:30:19 +0200
- Subject: Porting new target architecture to GCC
In a course at my university (UniversitÃt WÃrzburg, Germany) we have
created a 32-bit RISC CPU architecture -- the HaDesXI-CPU -- (in VHDL)
which we then play onto a FPGA (the Xilinx Spartan-3AN) to use. So far
if we want to do anything with it, we have to write the assembly code
How much work would it be to write a HadesXI backend for GCC?
(The idea is to use this as a possible bachelor thesis.)
Where would be a good place to start; what are the prerequisites for
undertaking a project like this other than knowing the CPU architecture
Thanks for your advice,