Re: Test Harness and SPARC VIS Instructions

[Joel Sherrill <joel dot sherrill at oarcorp dot com>]

Uros Bizjak wrote:
> Hello!
>
>   
> > Can someone familiar with VIS provide an instruction
> > that is OK to do a run-time test with to check if
> > it is supported?
> >     
>
> Perhaps this fragment from testsuite/gcc.dg/vect/tree-vect.h may help:
>
> #elif defined(__sparc__)
>   asm volatile (".word\t0x81b007c0");
>   
Thanks. That helped a lot.  Now I only see these cases on vect.exp

======================================

This one looks like another test slipping another unsupported
instruction by.

0x020012b8 <fbar+40>:   bne,pn   %icc, 0x200138c <fbar+252>

Is this UltraSPARC and not V7?  Do we need two bad instructions
in the test case?

Executing on host: /home/joel/work-gnat/svn/b-gcc1-sparc/gcc/xgcc 
-B/home/joel/work-gnat/svn/b-gcc1-sparc/gcc/ 
/home/joel/work-gnat/svn/gcc/gcc/testsuite/gcc.dg/vect/vect-align-2.c 
gcc_tg.o   -ftree-vectorize -fno-vect-cost-model -mcpu=ultrasparc -mvis 
-O2 -fdump-tree-vect-details -DSTACK_SIZE=2048 -fno-show-column 
-B/home/joel/work-gnat/svn/bsp-install/sparc-rtems4.9/sis/lib/ -specs 
bsp_specs -qrtems -mcpu=cypress 
/home/joel/work-gnat/svn/b-gcc1-sparc/rtems_gcc_main.o  -Wl,-wrap,exit 
-Wl,-wrap,_exit -Wl,-wrap,main -Wl,-wrap,abort -lm   -o 
./vect-align-2.exe    (timeout = 300)
PASS: gcc.dg/vect/vect-align-2.c (test for excess errors)
Unexpected trap (0x 2) at address 0x020012B8^M
illegal instruction^M
FAIL: gcc.dg/vect/vect-align-2.c execution test
======================================

Is there an option to disable these? These l

PASS: gcc.dg/vect/vect-align-2.c scan-tree-dump-times vect "Alignment of 
access forced using peeling" 0
PASS: gcc.dg/vect/vect-align-2.c scan-tree-dump-times vect "Alignment of 
access forced using versioning" 1
PASS: gcc.dg/vect/vect-align-2.c scan-tree-dump-times vect "vectorized 1 
loops" 1