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Re: SPE configuration in GCC

From: Mark Mitchell <mark at codesourcery dot com>
To: David Edelsohn <dje at watson dot ibm dot com>
Cc: gcc at gcc dot gnu dot org, aldyh at redhat dot com
Date: Mon, 17 Jan 2005 09:24:30 -0800
Subject: Re: SPE configuration in GCC
Organization: CodeSourcery, LLC
References: <41EBED9D.4080405@codesourcery.com> <200501171715.j0HHFsD30982@makai.watson.ibm.com>

David Edelsohn wrote:

	The rs6000 port now includes a number of architectures and
architectural features that cannot exist for some target configurations.
With GCC's genconditions infrastructure, setting the options to constant
zero allows the patterns to be omitted and the compiler to optimize out
tests, speeding up the compiler.

I understand. Certainly, if AIX or Darwin cannot support chip X, then there is not really much point in having a compiler for such a system support chip X.

But, for some configurations, such as a general-purpose PowerPC cross compiler, people would like to have the ability to use all of variants, even if that makes the compiler somewhat slower. What I'm questioning is the decision to make the default (in rs6000.h) a limited configuration, rather than to move the optimization into appropriate OS configuration files.

--
Mark Mitchell
CodeSourcery, LLC
mark@codesourcery.com
(916) 791-8304

References:
- SPE configuration in GCC
  - From: Mark Mitchell
- Re: SPE configuration in GCC
  - From: David Edelsohn

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