Re: Predicated execution / if-conversion?

[Richard Henderson <rth at redhat dot com>]

On Wed, Jan 21, 2004 at 04:33:33PM +0100, Jan Hoogerbrugge wrote:
> Could somebody tell me how to start with modelling predicated
> execution?  With a few exceptions, all operations can be
> predicated.

Then your best model is ia64.  You need to add

;; Predication.  True iff this instruction can be predicated.
(define_attr "predicable" "no,yes" (const_string "yes"))

and then set the attribute to "no" for those exceptions.
You also need to add

;; General predication pattern
(define_cond_exec
  [(match_operator 0 "predicate_operator"
    [(match_operand:BI 1 "register_operand" "c")
     (const_int 0)])]
  ""
  "")

> I noticed that the FRV port defines the IFCVT
> macros. Is that necessary or only to model more complex cases?

Complex cases.  FRV has a reasonably restricted form of predication.

> I noticed  "%," and current_insn_predicate in the ia64 port.
> How does this work?

The insn scanner in final recognizes the 

	(cond_exec (predicate)
	  (regular-insn))

form, sets up current_insn_predicate with (predicate), and then
calls the output pattern.  This is a conveniece to make the 
output patterns easier to write.  The "%," processing happens
in ia64_print_operand.

As for the rest of the output, that depends on your assembly
syntax.  IA-64 uses a prefix, and so is handed by the prefix
in define_cond_exec; ARM uses a suffix, and so is handled by
arm_print_operand with "%?".  Hopefully your syntax isn't 
more horrible than one of those two alternatives.  ;-)


r~