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Re: trouble with porting architecture
- From: Hans-Peter Nilsson <hp at bitrange dot com>
- To: tm_gccmail at kloo dot net
- Cc: Eric Botcazou <ebotcazou at libertysurf dot fr>, Geert Bosch <bosch at gnat dot com>, gcc at gcc dot gnu dot org, James Dessart <james at skwirl dot ca>
- Date: Wed, 31 Dec 2003 22:30:10 -0500 (EST)
- Subject: Re: trouble with porting architecture
- References: <Pine.LNX.4.21.0312301139280.19168-100000@mail.kloo.net>
On Tue, 30 Dec 2003 tm_gccmail@kloo.net wrote:
> "Page zero" is an implementation artifact on the 6502 and derivatives
> where addresses in the first 256 bytes can be accessed via a two-byte
> instruction rather than a three-byte instruction.
>
> This feature is specific to the 6502 and is not a generally supported
> feature on 8-bit processors.
>
> So using "page zero" only has an advantage on the 6502.
The 6809 *does* have a similar short addressing mode ("direct";
saving a whole byte) *and* the implied high byte "page" is a
settable register (DP); not necessarily zero, that is.
Not that short addressing modes are necessary for "faking"
registers, still facts are facts...
brgds, H-P
PS. Wow, so many google hits for "6809 reference card"!