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Re: trouble with porting architecture
- From: Eric Botcazou <ebotcazou at libertysurf dot fr>
- To: James Dessart <james at skwirl dot ca>
- Cc: gcc at gcc dot gnu dot org
- Date: Wed, 7 Jan 2004 19:51:28 +0100
- Subject: Re: trouble with porting architecture
- References: <C9C03961-3ADC-11D8-82CB-003065E07450@skwirl.ca> <005801c3cefb$39f0c760$6f9253d4@fr> <F2FD920A-3AF3-11D8-82CB-003065E07450@skwirl.ca>
> Hopefully this'll be of more help... sorry for the previous sparse and
> anemic report. :)
Thanks. I could reproduce the problem with my GCC 2.95.3-based compiler.
> ../contiki/ctk/ctk-conio.c:510: unable to generate reloads for:
> (insn 99 98 100 (set (reg:QI 0 d [32])
> (minus:QI (reg:QI 33)
> (reg:QI 0 d [34]))) 31 {subqi3} (nil)
> (expr_list:REG_DEAD (reg:QI 33)
> (expr_list:REG_DEAD (reg:QI 0 d [34])
> (nil))))
> ../contiki/ctk/ctk-conio.c:510: Internal compiler error in
> find_reloads, at reload.c:3576
> Please submit a full bug report,
> with preprocessed source if appropriate.
> See <URL:http://www.gnu.org/software/gcc/bugs.html> for instructions.
I was wrong: the insn is problematic because it's
op0 = op1 - op0
and not
op0 = op0 - op1.
The MC6809 back-end appears to use a "looseness" strategy to avoid generating
lots of memory references during RTL expansion and to expect that reload
will fix up everything at the end. This doesn't work here because the
subqi3 pattern is not commutative.
The attached patch restores the symmetry, but it was not tested except on
your testcase (the code looks correct at -O0, -O1, -O2).
--
Eric Botcazou--- m6809.md 2001/12/13 02:30:08 1.1
+++ m6809.md 2004/01/07 18:31:06
@@ -763,16 +763,25 @@
;;-}")
(define_insn "subqi3"
- [(set (match_operand:QI 0 "register_operand" "=q")
- (minus:QI (match_operand:QI 1 "register_operand" "0")
- (match_operand:QI 2 "address_operand" "min")))]
+ [(set (match_operand:QI 0 "register_operand" "=q,!q")
+ (minus:QI (match_operand:QI 1 "address_operand" "0,min")
+ (match_operand:QI 2 "address_operand" "min,0")))]
""
"*
{
- if (operands[2] == const1_rtx)
- return \"dec%0\\t\\t;subhi: R:%0 -= 1\";
- else
- return \"sub%0\\t%2\\t;subhi: R:%0 -= %2\";
+ if (which_alternative == 0) {
+ if (operands[2] == const1_rtx)
+ return \"dec%0\\t\\t;subqi: R:%0 -= 1\";
+ else
+ return \"sub%0\\t%2\\t;subqi: R:%0 -= %2\";
+ }
+ else {
+ if (operands[1] == const1_rtx)
+ output_asm_insn(\"dec%0\\t\\t;subqi: R:%0 = 1 - R:%0\", operands);
+ else
+ output_asm_insn(\"sub%0\\t%1\\t;subqi: R:%0 = %1 - R:%0\", operands);
+ return \"neg%0\";
+ }
}")
;;--------------------------------------------------------------------