This is the mail archive of the
mailing list for the GCC project.
Re: Bootstrap times on mainline are getting worse
On Fri, Oct 18, 2002 at 11:34:11AM -0400, Diego Novillo wrote:
> On Fri, 18 Oct 2002, Kaveh R. Ghazi wrote:
> > Care to take a stab?
> Heh, having the time to do that would be nice. A cursory look at
> the .diff files doesn't reveal anything blatantly obvious. Only
> three potential candidates:
> +2002-10-04 Roger Sayle <firstname.lastname@example.org>
> + * config/i386/i386.h (processor_costs): Add new fields fadd,
> + fmul, fdiv, fabs, fchs and fsqrt to costs structure.
> + (RTX_COSTS): Use these fields to determine the RTX costs
> + of floating point addition/subtraction, multiplication,
> + division, fabs, negation and square root respectively.
> + * config/i386/i386.c (size_cost): Provide instruction sizes
> + for these new fields.
> + (i386_cost, i486_cost, pentium_cost, pentiumpro_cost,
> + k6_cost, athlon_cost, pentium4_cost): Provide typical cycle
> + counts for these new fields for all x86 processor variants.
A 'time make bootstrap' on version "2002-10-03" gives:
With this patch I get:
$ cat /proc/cpuinfo
processor : 0
vendor_id : AuthenticAMD
cpu family : 6
model : 6
model name : AMD Athlon(tm) 4 Processor
stepping : 2
cpu MHz : 1399.803
cache size : 256 KB
fdiv_bug : no
hlt_bug : no
f00f_bug : no
coma_bug : no
fpu : yes
fpu_exception : yes
cpuid level : 1
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 sep mtrr pge mca cmov pat pse36 mmx fxsr sse syscall mmxext 3dnowext 3dnow
bogomips : 2791.83