Re: Bytes order and words order

[Gabriel Dos Reis <gdr at integrable-solutions dot net>]

Matt Austern <austern@apple.com> writes:

| On Friday, August 23, 2002, at 09:49 AM, Gabriel Dos Reis wrote:
| 
| > For example, while on a big or little-endian (for both bytes and words)
| > machine implementing IEEE-754 and using a 64-bit wide double, I could
| > plugin a generic definition for infinities, QNaN, SNaN, a
| > port-maintainer for VAX or ARM, for example, would have to give the
| > appropriate bytes.
| 
| The generic definition of qNaN and sNaN is one of the things I
| had in mind.  (I don't remember whether there were others, I'm
| afraid; I can try to find and check my notes.)  An NaN has an
| exponent with all ones and a nonzero mantissa.  My memory is
| that the standard doesn't say how to distinguish between a
| qNaN and an sNaN, and that this differs.

The mantissa of a QNaN has the most significant bit set to 1 and an
SNaN has it set to 0.  This is also what Kahan says here

   http://http.cs.berkeley.edu/~wkahan/ieee754status/ieee754.ps

|  On the PPC a qNaN
| has the most significant fraction bit 1 and an sNaN has 0,

Yes, that is what I have on SPARCs too.

| and
| for MIPS it's the other way around.

Hmm, how so? 

-- Gaby