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Re: Bytes order and words order
- From: Matt Austern <austern at apple dot com>
- To: Gabriel Dos Reis <gdr at integrable-solutions dot net>
- Cc: Richard dot Earnshaw at arm dot com, gcc at gcc dot gnu dot org
- Date: Fri, 23 Aug 2002 11:57:32 -0700
- Subject: Re: Bytes order and words order
On Friday, August 23, 2002, at 09:49 AM, Gabriel Dos Reis wrote:
For example, while on a big or little-endian (for both bytes and words)
machine implementing IEEE-754 and using a 64-bit wide double, I could
plugin a generic definition for infinities, QNaN, SNaN, a
port-maintainer for VAX or ARM, for example, would have to give the
appropriate bytes.
The generic definition of qNaN and sNaN is one of the things I
had in mind. (I don't remember whether there were others, I'm
afraid; I can try to find and check my notes.) An NaN has an
exponent with all ones and a nonzero mantissa. My memory is
that the standard doesn't say how to distinguish between a
qNaN and an sNaN, and that this differs. On the PPC a qNaN
has the most significant fraction bit 1 and an sNaN has 0, and
for MIPS it's the other way around.
--Matt