Re: Graph coloring for register allocation?

[Jeffrey A Law <law at redhat dot com>]

  In message <20010124121031.J20522@wolery.stanford.edu>you write:
  > The problem I see, as with most things in Morgan, is that he assumes a
  > symmetric, RISCy target chip.  One big set of integer registers, one
  > big set of float registers.  I don't know how well the idea will map
  > to machines with odd register classes.
I believe it maps reasonably well.  You just need to compute the estimated
pressure for each class and compare the estimated pressure with the number
of registers of that particular class that are available.

Where I think it falls down is when we have values that can live in
multiple register classes, even though they prefer a specific class
(like addresses on machines with separate address and data registers).

That may (or may not) be solvable by also computing pressure for the
superclasses and using that to decide if it's worth creating a split
range when there aren't enough registers of the subclass available.

jeff