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Re: Incrementing volatiles?
- To: "Philippe De Muyter" <phdm at macqel dot be>
- Subject: Re: Incrementing volatiles?
- From: Andreas Schwab <schwab at issan dot informatik dot uni-dortmund dot de>
- Date: 13 Jul 1998 11:40:28 +0200
- Cc: jvickers at dial dot pipex dot com (John Vickers), smurf at noris dot de, egcs at cygnus dot com
- References: <199807130936.LAA03530@mail.macqel.be>
"Philippe De Muyter" <phdm@macqel.be> writes:
|> Sorry to be slightly off-topic, but this discussion reminds me a problem
|> I encountered some months ago when writing a driver for a VME board in
|> an AIX powerpc environment. Although I had declared all the registers
|> of the chips on the board as volatile, and compiled my driver with gcc,
|> I saw with a logic analyser on the VME bus that the accesses to the
|> register on the board were not done in the order I had written them.
|> To solve that problem, I had to manually add asm("eieio") after each
|> access to a volatile register. Should gcc not do that for me ?
I don't think so. It's the responsibility of the system software to
make sure that accesses to hardware registers are uncached and serialized.
--
Andreas Schwab "And now for something
schwab@issan.informatik.uni-dortmund.de completely different"
schwab@gnu.org