Bug 99249 - SVE: ICE in aarch64_expand_sve_const_vector (during RTL pass: early_remat)
Summary: SVE: ICE in aarch64_expand_sve_const_vector (during RTL pass: early_remat)
Status: RESOLVED FIXED
Alias: None
Product: gcc
Classification: Unclassified
Component: target (show other bugs)
Version: 11.0
: P3 normal
Target Milestone: 10.4
Assignee: Richard Sandiford
URL:
Keywords: ice-on-valid-code
Depends on:
Blocks:
 
Reported: 2021-02-24 11:45 UTC by Alex Coplan
Modified: 2021-04-23 16:32 UTC (History)
2 users (show)

See Also:
Host:
Target: aarch64
Build:
Known to work:
Known to fail: 10.2.1, 11.0
Last reconfirmed: 2021-02-24 00:00:00


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Description Alex Coplan 2021-02-24 11:45:50 UTC
The following fails:

$ cat test.cc
#include <arm_sve.h>
extern char b[];
int x;
void f() {
  while (x) {
    x = svaddv(
        svnot_z(svnot_z(svptrue_pat_b8(SV_VL6),
                        svmov_z(svptrue_pat_b8(SV_VL1),
                                svptrue_pat_b16(SV_VL3))),
                svptrue_pat_b64(SV_VL2)),
        svdup_s32(8193));
    for (int j = x; j; j++)
      b[j] = 0;
  }
}
$ aarch64-linux-gnu-gcc -c -march=armv8.2-a+sve -Os test.cc
during RTL pass: early_remat
test.cc: In function ‘void f()’:
test.cc:15:1: internal compiler error: in aarch64_expand_sve_const_vector, at config/aarch64/aarch64.c:4956
   15 | }
      | ^
0x14ffb66 aarch64_expand_sve_const_vector
        /home/alecop01/toolchain/src/gcc/gcc/config/aarch64/aarch64.c:4956
0x15019b1 aarch64_expand_mov_immediate(rtx_def*, rtx_def*)
        /home/alecop01/toolchain/src/gcc/gcc/config/aarch64/aarch64.c:5395
0x19afb10 gen_movvnx16qi(rtx_def*, rtx_def*)
        /home/alecop01/toolchain/src/gcc/gcc/config/aarch64/aarch64-sve.md:662
0xcab8e6 rtx_insn* insn_gen_fn::operator()<rtx_def*, rtx_def*>(rtx_def*, rtx_def*) const
        /home/alecop01/toolchain/src/gcc/gcc/recog.h:407
0xcab8e6 emit_move_insn_1(rtx_def*, rtx_def*)
        /home/alecop01/toolchain/src/gcc/gcc/expr.c:3766
0xcabe37 emit_move_insn(rtx_def*, rtx_def*)
        /home/alecop01/toolchain/src/gcc/gcc/expr.c:3936
0xc7e694 force_reg(machine_mode, rtx_def*)
        /home/alecop01/toolchain/src/gcc/gcc/explow.c:677
0x14ffc4f aarch64_expand_sve_const_vector
        /home/alecop01/toolchain/src/gcc/gcc/config/aarch64/aarch64.c:4964
0x15019b1 aarch64_expand_mov_immediate(rtx_def*, rtx_def*)
        /home/alecop01/toolchain/src/gcc/gcc/config/aarch64/aarch64.c:5395
0x19afb10 gen_movvnx16qi(rtx_def*, rtx_def*)
        /home/alecop01/toolchain/src/gcc/gcc/config/aarch64/aarch64-sve.md:662
0xcab8e6 rtx_insn* insn_gen_fn::operator()<rtx_def*, rtx_def*>(rtx_def*, rtx_def*) const
        /home/alecop01/toolchain/src/gcc/gcc/recog.h:407
0xcab8e6 emit_move_insn_1(rtx_def*, rtx_def*)
        /home/alecop01/toolchain/src/gcc/gcc/expr.c:3766
0xcabe37 emit_move_insn(rtx_def*, rtx_def*)
        /home/alecop01/toolchain/src/gcc/gcc/expr.c:3936
0xc7e614 copy_to_mode_reg(machine_mode, rtx_def*)
        /home/alecop01/toolchain/src/gcc/gcc/explow.c:653
0xf69b69 maybe_legitimize_operand
        /home/alecop01/toolchain/src/gcc/gcc/optabs.c:7626
0xf69b69 maybe_legitimize_operands(insn_code, unsigned int, unsigned int, expand_operand*)
        /home/alecop01/toolchain/src/gcc/gcc/optabs.c:7758
0xf69e52 maybe_gen_insn(insn_code, unsigned int, expand_operand*)
        /home/alecop01/toolchain/src/gcc/gcc/optabs.c:7777
0xf6a06e maybe_expand_insn(insn_code, unsigned int, expand_operand*)
        /home/alecop01/toolchain/src/gcc/gcc/optabs.c:7820
0xf69605 expand_insn(insn_code, unsigned int, expand_operand*)
        /home/alecop01/toolchain/src/gcc/gcc/optabs.c:7851
0x14d45d2 aarch64_sve_emit_int_cmp
        /home/alecop01/toolchain/src/gcc/gcc/config/aarch64/aarch64.c:3920
Please submit a full bug report,
with preprocessed source if appropriate.
Please include the complete backtrace with any bug report.
See <https://gcc.gnu.org/bugs/> for instructions.
Comment 1 ktkachov 2021-02-24 12:00:24 UTC
Confirmed on the 10 branch as well.
Comment 2 Richard Biener 2021-04-08 12:02:11 UTC
GCC 10.3 is being released, retargeting bugs to GCC 10.4.
Comment 3 Richard Sandiford 2021-04-13 18:07:49 UTC
Mine.
Comment 4 Richard Sandiford 2021-04-15 11:01:06 UTC
Fixed by https://gcc.gnu.org/git/gitweb.cgi?p=gcc.git;h=a065e0bb092a010664777394530ab1a52bb5293b,
but I typoed the PR number.
Comment 5 GCC Commits 2021-04-23 09:10:55 UTC
The releases/gcc-10 branch has been updated by Richard Sandiford <rsandifo@gcc.gnu.org>:

https://gcc.gnu.org/g:690aa217cf2882e58a0572171a3dd8e346f616cf

commit r10-9754-g690aa217cf2882e58a0572171a3dd8e346f616cf
Author: Richard Sandiford <richard.sandiford@arm.com>
Date:   Fri Apr 23 10:09:42 2021 +0100

    aarch64: Handle more SVE vector constants [PR99246]
    
    PR99246 is about a case in which we failed to handle a CONST_VECTOR
    with NELTS_PER_PATTERN==2, i.e. a vector with a âforegroundâ sequence
    of N vectors followed by a repeating âbackgroundâ sequence of N vectors.
    
    At the moment, it's difficult to produce these vectors directly,
    but I'm hoping that for GCC 12 we'll do more folding, which will
    in turn make this easier to test and easier to optimise.  Until then,
    the patch simply relies on the testcase in the PR.
    
    gcc/
            PR target/99249
            * config/aarch64/aarch64.c (aarch64_expand_sve_const_vector_sel):
            New function.
            (aarch64_expand_sve_const_vector): Use it for nelts_per_pattern==2.
    
    gcc/testsuite/
            PR target/99249
            * gcc.target/aarch64/sve/acle/general/pr99246.c: New test.
    
    (cherry picked from commit a065e0bb092a010664777394530ab1a52bb5293b)
Comment 6 Richard Sandiford 2021-04-23 16:32:15 UTC
I was going to backport this further than GCC 10, but it turns
out that the code changed too much in the GCC 9->GCC 10 timeframe
for it to apply cleanly.  I'm also not aware of any way of triggering
the bug before GCC 10.