gcc-11.0.0-alpha20200809 snapshot (g:71197a5d13d0b540a9b5efe7ae2512d76386e9d1) ICEs when compiling the following testcase w/ -O2 -fno-expensive-optimizations -fno-gcse: int ky; long int h1; __int128 f1; int sd (void); int __attribute__ ((simd)) i8 (void) { __int128 vh; if (sd () == 0) h1 = 0; do { long int lf = h1; long int w1 = f1; if (w1 == 0) lf = 0; else lf = lf && w1; ky += lf; vh = lf | f1; f1 = 1; } while (vh < (f1 ^ 2)); return 0; } % x86_64-unknown-linux-gnu-gcc-11.0.0 -O2 -fno-expensive-optimizations -fno-gcse -c yocbyzz3.c yocbyzz3.c: In function 'i8.simdclone.6': yocbyzz3.c:34:1: error: insn does not satisfy its constraints: 34 | } | ^ (insn 157 14 158 3 (parallel [ (set (reg:DI 20 xmm0 [orig:121 _53 ] [121]) (const_int 0 [0])) (clobber (reg:CC 17 flags)) ]) "yocbyzz3.c":13:6 68 {*movdi_xor} (expr_list:REG_UNUSED (reg:CC 17 flags) (nil))) during RTL pass: cprop_hardreg yocbyzz3.c:34:1: internal compiler error: in extract_constrain_insn, at recog.c:2195 0x68e957 _fatal_insn(char const*, rtx_def const*, char const*, int, char const*) /var/tmp/portage/sys-devel/gcc-11.0.0_alpha20200809/work/gcc-11-20200809/gcc/rtl-error.c:108 0x68e97d _fatal_insn_not_found(rtx_def const*, char const*, int, char const*) /var/tmp/portage/sys-devel/gcc-11.0.0_alpha20200809/work/gcc-11-20200809/gcc/rtl-error.c:118 0x68cfb5 extract_constrain_insn(rtx_insn*) /var/tmp/portage/sys-devel/gcc-11.0.0_alpha20200809/work/gcc-11-20200809/gcc/recog.c:2195 0xcf76fb copyprop_hardreg_forward_1 /var/tmp/portage/sys-devel/gcc-11.0.0_alpha20200809/work/gcc-11-20200809/gcc/regcprop.c:802 0xcf864e execute /var/tmp/portage/sys-devel/gcc-11.0.0_alpha20200809/work/gcc-11-20200809/gcc/regcprop.c:1367
The internal loop can be simplified a bit: do { long int lf = (long int) f1 ? h1 : 0; ky += lf; vh = lf | f1; f1 = 1; } while (vh < (f1 ^ 2));
Confirmed, introduced by g:c072fd236dc08f990bfcffd98b27f211a39bb404 that adds too broad peephole2 match. Should be fixed by: --cut here-- diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 4e916bf3c32..8836552bc17 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -18938,7 +18938,7 @@ ;; i.e. prefer "xorl %eax,%eax; test/cmp" over "test/cmp; movl $0, %eax". (define_peephole2 [(set (reg FLAGS_REG) (match_operand 0)) - (set (match_operand:SWI 1 "register_operand") (const_int 0))] + (set (match_operand:SWI 1 "general_reg_operand") (const_int 0))] "peep2_regno_dead_p (0, FLAGS_REG) && !reg_overlap_mentioned_p (operands[1], operands[0])" [(set (match_dup 2) (match_dup 0))] --cut here--
*** Bug 96587 has been marked as a duplicate of this bug. ***
The master branch has been updated by Roger Sayle <sayle@gcc.gnu.org>: https://gcc.gnu.org/g:32c69a56981bd72a52b7d234a2936020f97909d1 commit r11-2679-g32c69a56981bd72a52b7d234a2936020f97909d1 Author: Roger Sayle <roger@nextmovesoftware.com> Date: Wed Aug 12 22:34:29 2020 +0100 PR target/96558: Only call ix86_expand_clear with GENERAL_REGS. The following patch tightens the predicates of the peephole2 from my recent "Integer min/max improvements patch" to only hoist clearing a register when that register is a general register. Calling ix86_expand_clear with regs other than GENERAL_REGS is not supported. 2020-08-12 Roger Sayle <roger@nextmovesoftware.com> Uroš Bizjak <ubizjak@gmail.com> gcc/ChangeLog PR target/96558 * config/i386/i386.md (peephole2): Only reorder register clearing instructions to allow use of xor for general registers. gcc/testsuite/ChangeLog PR target/96558 * gcc.dg/pr96558.c: New test.
Should this PR be closed now?
Fixed. Thanks for everyone's help. Sorry again.