Bug 93333 - ICE: RTL check: expected code 'const_int', have 'and' in riscv_rtx_costs, at config/riscv/riscv.c:1645
Summary: ICE: RTL check: expected code 'const_int', have 'and' in riscv_rtx_costs, at ...
Status: RESOLVED FIXED
Alias: None
Product: gcc
Classification: Unclassified
Component: target (show other bugs)
Version: 10.0
: P3 normal
Target Milestone: ---
Assignee: Not yet assigned to anyone
URL:
Keywords: ice-checking, ice-on-valid-code
Depends on:
Blocks:
 
Reported: 2020-01-20 14:57 UTC by Zdenek Sojka
Modified: 2020-02-14 16:37 UTC (History)
2 users (show)

See Also:
Host: x86_64-pc-linux-gnu
Target: riscv64-unknown-linux-gnu
Build:
Known to work: 7.5.0
Known to fail: 10.0, 8.3.1, 9.2.1
Last reconfirmed: 2020-01-21 00:00:00


Attachments
reduced testcase (101 bytes, text/plain)
2020-01-20 14:57 UTC, Zdenek Sojka
Details

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Description Zdenek Sojka 2020-01-20 14:57:07 UTC
Created attachment 47684 [details]
reduced testcase

RTL checking might be needed to reproduce this.

Compiler output:
$ riscv64-unknown-linux-gnu-gcc -O2 testcase.c
during RTL pass: combine
testcase.c: In function 'foo':
testcase.c:8:1: internal compiler error: RTL check: expected code 'const_int', have 'and' in riscv_rtx_costs, at config/riscv/riscv.c:1645
    8 | }
      | ^
0x6ce0f9 rtl_check_failed_code1(rtx_def const*, rtx_code, char const*, int, char const*)
        /repo/gcc-trunk/gcc/rtl.c:879
0x7979c1 riscv_rtx_costs
        /repo/gcc-trunk/gcc/config/riscv/riscv.c:1645
0xe3d427 rtx_cost(rtx_def*, machine_mode, rtx_code, int, bool)
        /repo/gcc-trunk/gcc/rtlanal.c:4279
0x14b56bc set_src_cost
        /repo/gcc-trunk/gcc/rtl.h:2932
0x14b56bc make_extraction
        /repo/gcc-trunk/gcc/combine.c:7980
0x14b9438 make_compound_operation_int
        /repo/gcc-trunk/gcc/combine.c:8194
0x14b9438 make_compound_operation(rtx_def*, rtx_code)
        /repo/gcc-trunk/gcc/combine.c:8510
0x14be356 simplify_set
        /repo/gcc-trunk/gcc/combine.c:7031
0x14be356 combine_simplify_rtx
        /repo/gcc-trunk/gcc/combine.c:6441
0x14c278f subst
        /repo/gcc-trunk/gcc/combine.c:5720
0x14c49d4 try_combine
        /repo/gcc-trunk/gcc/combine.c:3479
0x14cd56a combine_instructions
        /repo/gcc-trunk/gcc/combine.c:1442
0x14cd56a rest_of_handle_combine
        /repo/gcc-trunk/gcc/combine.c:15059
0x14cd56a execute
        /repo/gcc-trunk/gcc/combine.c:15104
Please submit a full bug report,
with preprocessed source if appropriate.
Please include the complete backtrace with any bug report.
See <https://gcc.gnu.org/bugs/> for instructions.

The failing code is:
1643:    case ZERO_EXTRACT:
1644:      /* This is an SImode shift.  */
1645:      if (outer_code == SET && (INTVAL (XEXP (x, 2)) > 0)
1646:	  && (INTVAL (XEXP (x, 1)) + INTVAL (XEXP (x, 2)) == 32))
1647:	{
1648:	  *total = COSTS_N_INSNS (SINGLE_SHIFT_COST);
1649:	  return true;
1650:	}
1651:      return false;


$ riscv64-unknown-linux-gnu-gcc -v
Using built-in specs.
COLLECT_GCC=/repo/gcc-trunk/binary-latest-riscv64/bin/riscv64-unknown-linux-gnu-gcc
COLLECT_LTO_WRAPPER=/repo/gcc-trunk/binary-trunk-20200120111030-92ce93c743b-checking-yes-rtl-df-extra-riscv64/bin/../libexec/gcc/riscv64-unknown-linux-gnu/10.0.1/lto-wrapper
Target: riscv64-unknown-linux-gnu
Configured with: /repo/gcc-trunk//configure --enable-languages=c,c++ --enable-valgrind-annotations --disable-nls --enable-checking=yes,rtl,df,extra --with-cloog --with-ppl --with-isl --with-sysroot=/usr/riscv64-unknown-linux-gnu --build=x86_64-pc-linux-gnu --host=x86_64-pc-linux-gnu --target=riscv64-unknown-linux-gnu --with-ld=/usr/bin/riscv64-unknown-linux-gnu-ld --with-as=/usr/bin/riscv64-unknown-linux-gnu-as --disable-multilib --disable-libstdcxx-pch --prefix=/repo/gcc-trunk//binary-trunk-20200120111030-92ce93c743b-checking-yes-rtl-df-extra-riscv64
Thread model: posix
Supported LTO compression algorithms: zlib zstd
gcc version 10.0.1 20200120 (experimental) (GCC)
Comment 1 Jakub Jelinek 2020-01-20 19:09:01 UTC
Can't reproduce with very similarly configured cross.
I do see:
Trying 14 -> 15:
   14: r86:SI=r90:SI 0>>r89:SI#0
      REG_DEAD r90:SI
      REG_DEAD r89:SI
   15: r87:SI=r86:SI&0x1f
      REG_DEAD r86:SI
Failed to match this instruction:
(set (reg:SI 87)
    (zero_extract:SI (reg:SI 90)
        (const_int 5 [0x5])
        (zero_extend:SI (subreg:QI (reg:SI 89) 0))))
Failed to match this instruction:
(set (reg:SI 87)
    (zero_extract:SI (reg:SI 90)
        (const_int 5 [0x5])
        (and:SI (reg:SI 89)
            (const_int 255 [0xff]))))
and
Failed to match this instruction:
(set (reg:SI 88 [ i ])
    (lshiftrt:SI (reg/v:SI 84 [ i ])
        (subreg:QI (zero_extract:SI (reg:SI 90)
                (const_int 5 [0x5])
                (zero_extend:SI (subreg:QI (reg:SI 89) 0))) 0)))
Failed to match this instruction:
(set (reg:SI 88 [ i ])
    (lshiftrt:SI (reg/v:SI 84 [ i ])
        (subreg:QI (zero_extract:SI (reg:SI 90)
                (const_int 5 [0x5])
                (and:SI (reg:SI 89)
                    (const_int 255 [0xff]))) 0)))
etc. in the combine dump, but no such zero_extract was ever matched (I couldn't see how it could be, all the zero_extract riscv patterns require CONST_INT in the last two operands) and I see no ZERO_EXTRACT in all the set_src_cost calls called from make_extraction.

So, any special tuning/whatever that isn't shown?

The fix would likely be something along the lines of
--- gcc/config/riscv/riscv.c	2020-01-12 11:54:36.385413831 +0100
+++ gcc/config/riscv/riscv.c	2020-01-20 20:06:04.729542828 +0100
@@ -1642,7 +1642,10 @@ riscv_rtx_costs (rtx x, machine_mode mod
 
     case ZERO_EXTRACT:
       /* This is an SImode shift.  */
-      if (outer_code == SET && (INTVAL (XEXP (x, 2)) > 0)
-	  && (INTVAL (XEXP (x, 1)) + INTVAL (XEXP (x, 2)) == 32))
+      if (outer_code == SET
+	  && CONST_INT_P (XEXP (x, 1))
+	  && CONST_INT_P (XEXP (x, 2))
+	  && INTVAL (XEXP (x, 2)) > 0
+	  && INTVAL (XEXP (x, 1)) + INTVAL (XEXP (x, 2)) == 32)
 	{
 	  *total = COSTS_N_INSNS (SINGLE_SHIFT_COST);

but I'd say being able to reproduce is important.
Comment 2 Jim Wilson 2020-01-21 00:21:52 UTC
I can reproduce.  Reproducing requires enabling rtl checking which is not on by default.  I suspect that there are other similar problems, as we probably haven't tested a build with rtl checking enabled before.

The problem is in riscv_rtx_costs which only needs to return valid values for valid rtl, and it is failing the rtl check for invalid rtl, so this isn't a major problem if rtl checking is off, but it does need to be fixed to be safe.
Comment 3 Jim Wilson 2020-01-21 00:24:23 UTC
Jakub's patch looks OK, and works for the testcase.
Comment 4 Jim Wilson 2020-01-21 04:01:24 UTC
I tried some cross testing with rtl checking enabled, and found another rtl check bug with the -msave-restore support in config/riscv/riscv-sr.c where it uses XINT to read from a CONST_INT which is wrong, as it is actually an XWINT value, and we should be using INTVAL to read the value.  I've tested a patch for that, and can commit it tomorrow.  -msave-restore is for embedded code size, so this shouldn't be a problem for linux users.
Comment 5 Jakub Jelinek 2020-01-21 08:32:34 UTC
(In reply to Jim Wilson from comment #2)
> I can reproduce.  Reproducing requires enabling rtl checking which is not on
> by default.  I suspect that there are other similar problems, as we probably
> haven't tested a build with rtl checking enabled before.

Sure, I did that too:
../configure --enable-languages=c,c++ --disable-nls --enable-checking=yes,rtl,df,extra --build=x86_64-pc-linux-gnu --host=x86_64-pc-linux-gnu --target=riscv64-linux-gnu --with-ld=/usr/bin/riscv64-linux-gnu-ld --with-as=/usr/bin/riscv64-linux-gnu-as --disable-multilib --disable-libstdcxx-pch
Still, for whatever reason it hasn't been called that way at all for me.

BTW, rtl checking (unlike df checking and even much more so fold or valgrind checking) isn't that expensive and I use it daily for x86_64/i686-linux bootstraps, so certainly it doesn't hurt to use it for full bootstrap once a month or so.
Comment 6 GCC Commits 2020-01-21 20:46:50 UTC
The master branch has been updated by Jakub Jelinek <jakub@gcc.gnu.org>:

https://gcc.gnu.org/g:bd0a3e244d94ad4a5e41f01ebf285f0861cb4a03

commit r10-6118-gbd0a3e244d94ad4a5e41f01ebf285f0861cb4a03
Author: Jakub Jelinek <jakub@redhat.com>
Date:   Tue Jan 21 21:43:03 2020 +0100

    riscv: Fix up riscv_rtx_costs for RTL checking (PR target/93333)
    
    As mentioned in the PR, during combine rtx_costs can be called sometimes
    even on RTL that has not been validated yet and so can contain even operands
    that aren't valid in any instruction.
    
    2020-01-21  Jakub Jelinek  <jakub@redhat.com>
    
    	PR target/93333
    	* config/riscv/riscv.c (riscv_rtx_costs) <case ZERO_EXTRACT>: Verify
    	the last two operands are CONST_INT_P before using them as such.
    
    	* gcc.c-torture/compile/pr93333.c: New test.
Comment 7 Jim Wilson 2020-01-21 23:27:45 UTC
Fixed on mainline.
Comment 8 GCC Commits 2020-01-22 19:20:27 UTC
The releases/gcc-9 branch has been updated by Jakub Jelinek <jakub@gcc.gnu.org>:

https://gcc.gnu.org/g:51faa475c91c5373b680889664d1d52a73a79776

commit r9-8165-g51faa475c91c5373b680889664d1d52a73a79776
Author: Jakub Jelinek <jakub@redhat.com>
Date:   Wed Jan 22 17:55:23 2020 +0100

    riscv: Fix up riscv_rtx_costs for RTL checking (PR target/93333)
    
    As mentioned in the PR, during combine rtx_costs can be called sometimes
    even on RTL that has not been validated yet and so can contain even operands
    that aren't valid in any instruction.
    
    2020-01-21  Jakub Jelinek  <jakub@redhat.com>
    
    	PR target/93333
    	* config/riscv/riscv.c (riscv_rtx_costs) <case ZERO_EXTRACT>: Verify
    	the last two operands are CONST_INT_P before using them as such.
    
    	* gcc.c-torture/compile/pr93333.c: New test.
Comment 9 GCC Commits 2020-02-14 16:37:49 UTC
The releases/gcc-8 branch has been updated by Jakub Jelinek <jakub@gcc.gnu.org>:

https://gcc.gnu.org/g:0b00f43cf381f03aeaced375f8f0ef1e731c9f43

commit r8-10007-g0b00f43cf381f03aeaced375f8f0ef1e731c9f43
Author: Jakub Jelinek <jakub@redhat.com>
Date:   Fri Feb 14 15:41:22 2020 +0100

    riscv: Fix up riscv_rtx_costs for RTL checking (PR target/93333)
    
    As mentioned in the PR, during combine rtx_costs can be called sometimes
    even on RTL that has not been validated yet and so can contain even operands
    that aren't valid in any instruction.
    
    2020-01-21  Jakub Jelinek  <jakub@redhat.com>
    
    	PR target/93333
    	* config/riscv/riscv.c (riscv_rtx_costs) <case ZERO_EXTRACT>: Verify
    	the last two operands are CONST_INT_P before using them as such.
    
    	* gcc.c-torture/compile/pr93333.c: New test.