Bug 89343 - Some MMX instructions aren't properly marked
Summary: Some MMX instructions aren't properly marked
Status: RESOLVED INVALID
Alias: None
Product: gcc
Classification: Unclassified
Component: target (show other bugs)
Version: 9.0
: P3 normal
Target Milestone: ---
Assignee: Not yet assigned to anyone
URL:
Keywords:
Depends on:
Blocks:
 
Reported: 2019-02-13 18:58 UTC by H.J. Lu
Modified: 2019-02-13 21:59 UTC (History)
1 user (show)

See Also:
Host:
Target: i386, x86-64
Build:
Known to work:
Known to fail:
Last reconfirmed:


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Description H.J. Lu 2019-02-13 18:58:06 UTC
(define_insn "*vec_concatv2sf_sse4_1"
  [(set (match_operand:V2SF 0 "register_operand"
          "=Yr,*x, v,Yr,*x,v,v,*y ,*y")
        (vec_concat:V2SF
          (match_operand:SF 1 "nonimmediate_operand"
          "  0, 0,Yv, 0,0, v,m, 0 , m")
          (match_operand:SF 2 "nonimm_or_0_operand"
          " Yr,*x,Yv, m,m, m,C,*ym, C")))]
  "TARGET_SSE4_1 && !(MEM_P (operands[1]) && MEM_P (operands[2]))"
  "@
   unpcklps\t{%2, %0|%0, %2}
   unpcklps\t{%2, %0|%0, %2}
   vunpcklps\t{%2, %1, %0|%0, %1, %2}
   insertps\t{$0x10, %2, %0|%0, %2, 0x10}
   insertps\t{$0x10, %2, %0|%0, %2, 0x10}
   vinsertps\t{$0x10, %2, %1, %0|%0, %1, %2, 0x10}
   %vmovss\t{%1, %0|%0, %1}
   punpckldq\t{%2, %0|%0, %2}
   movd\t{%1, %0|%0, %1}"
  [(set (attr "isa")
     (cond [(eq_attr "alternative" "0,1,3,4")
              (const_string "noavx")
            (eq_attr "alternative" "2,5")
              (const_string "avx")
           ]
           (const_string "*")))


(define_insn "*vec_concatv2sf_sse"
  [(set (match_operand:V2SF 0 "register_operand"     "=x,x,*y,*y")
        (vec_concat:V2SF
          (match_operand:SF 1 "nonimmediate_operand" " 0,m, 0, m")
          (match_operand:SF 2 "reg_or_0_operand"     " x,C,*y, C")))]
  "TARGET_SSE"
  "@
   unpcklps\t{%2, %0|%0, %2}
   movss\t{%1, %0|%0, %1}
   punpckldq\t{%2, %0|%0, %2}
   movd\t{%1, %0|%0, %1}"
  [(set_attr "type" "sselog,ssemov,mmxcvt,mmxmov")
   (set_attr "mode" "V4SF,SF,DI,DI")])

The movd alternatives only require MMX.
Comment 1 Uroš Bizjak 2019-02-13 21:59:43 UTC
There is nothing wrong with MMX alternatives in SSE patterns. MMX registers can carry V2SI/V2SF values as well, and these alternatives will be correctly disabled with -mno-mmx.