Created attachment 44518 [details] reduced testcase Compiler output: $ aarch64-unknown-linux-gnu-gcc -O testcase.c /tmp/cc93Bw20.s: Assembler messages: /tmp/cc93Bw20.s:39: Error: operand 1 must be an integer register -- `adcs [sp,104],x3,x0' $ aarch64-unknown-linux-gnu-gcc -v Using built-in specs. COLLECT_GCC=/repo/gcc-trunk/binary-latest-aarch64/bin/aarch64-unknown-linux-gnu-gcc COLLECT_LTO_WRAPPER=/repo/gcc-trunk/binary-trunk-263387-checking-yes-rtl-df-extra-aarch64/bin/../libexec/gcc/aarch64-unknown-linux-gnu/9.0.0/lto-wrapper Target: aarch64-unknown-linux-gnu Configured with: /repo/gcc-trunk//configure --enable-languages=c,c++ --enable-valgrind-annotations --disable-nls --enable-checking=yes,rtl,df,extra --with-cloog --with-ppl --with-isl --with-sysroot=/usr/aarch64-unknown-linux-gnu --build=x86_64-pc-linux-gnu --host=x86_64-pc-linux-gnu --target=aarch64-unknown-linux-gnu --with-ld=/usr/bin/aarch64-unknown-linux-gnu-ld --with-as=/usr/bin/aarch64-unknown-linux-gnu-as --disable-libstdcxx-pch --prefix=/repo/gcc-trunk//binary-trunk-263387-checking-yes-rtl-df-extra-aarch64 Thread model: posix gcc version 9.0.0 20180808 (experimental) (GCC) The assembler is right, adcs needs all 3 arguments to be regsiters: https://static.docs.arm.com/ddi0487/ca/DDI0487C_a_armv8_arm.pdf
confirmed
Author: rearnsha Date: Thu Aug 9 13:39:17 2018 New Revision: 263446 URL: https://gcc.gnu.org/viewcvs?rev=263446&root=gcc&view=rev Log: aarch64 - PR target/86887 Fix missing register constraints in carryin patterns Some of the carryin insn patterns are missing a register constraint. That means that the register allocator can pick practically anything to hold that value, including memory locations, or registers of the wrong class. PR target/86887 * config/aarch64/aarch64.md (add<mode>3_carryinC_zero): Add missing register constraint to operand 0. (add<mode>3_carryinC): Likewise. (add<mode>3_carryinV_zero, add<mode>3_carryinV): Likewise. Modified: trunk/gcc/ChangeLog trunk/gcc/config/aarch64/aarch64.md
Fixed.