Bug 85988 - Incorrect offsets of __private_tm and pointer_guard
Summary: Incorrect offsets of __private_tm and pointer_guard
Status: UNCONFIRMED
Alias: None
Product: gcc
Classification: Unclassified
Component: libitm (show other bugs)
Version: 9.0
: P3 normal
Target Milestone: ---
Assignee: Not yet assigned to anyone
URL:
Keywords:
Depends on:
Blocks:
 
Reported: 2018-05-29 22:17 UTC by H.J. Lu
Modified: 2018-06-12 11:09 UTC (History)
2 users (show)

See Also:
Host:
Target: x86-64-*-linux*
Build:
Known to work:
Known to fail:
Last reconfirmed:


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Description H.J. Lu 2018-05-29 22:17:32 UTC
In glibc, sysdeps/i386/nptl/tls.h has

typedef struct
{
  void *tcb;            /* Pointer to the TCB.  Not necessarily the
                           thread descriptor used by libpthread.  */
  dtv_t *dtv;
  void *self;           /* Pointer to the thread descriptor.  */
  int multiple_threads;
  uintptr_t sysinfo;
  uintptr_t stack_guard;
  uintptr_t pointer_guard;
  int gscope_flag;
  int __glibc_reserved1;
  /* Reservation of some values for the TM ABI.  */
  void *__private_tm[4];
  /* GCC split stack support.  */
  void *__private_ss;
} tcbhead_t;

and sysdeps/x86_64/nptl/tls.h has


typedef struct
{
  void *tcb;            /* Pointer to the TCB.  Not necessarily the
                           thread descriptor used by libpthread.  */
  dtv_t *dtv;
  void *self;           /* Pointer to the thread descriptor.  */
  int multiple_threads;
  int gscope_flag;
  uintptr_t sysinfo;
  uintptr_t stack_guard;
  uintptr_t pointer_guard;
  unsigned long int vgetcpu_cache[2];
  int __glibc_reserved1;
  int __glibc_unused1;
  /* Reservation of some values for the TM ABI.  */
  void *__private_tm[4];
  /* GCC split stack support.  */
  void *__private_ss;
  long int __glibc_reserved2;
  /* Must be kept even if it is no longer used by glibc since programs,
     like AddressSanitizer, depend on the size of tcbhead_t.  */
  __128bits __glibc_unused2[8][4] __attribute__ ((aligned (32)));

  void *__padding[8];
} tcbhead_t;

The offsets of __private_tm are

i386:   36 bytes != 4 * 10 bytes
x32:    48 bytes != 4 * 10 btes
x86_64: 80 bytes == 8 * 10 bytes

But config/linux/x86/tls.h has

#ifdef __x86_64__
#ifdef __LP64__
# define SEG_READ(OFS)          "movq\t%%fs:(" #OFS "*8),%0"
# define SEG_WRITE(OFS)         "movq\t%0,%%fs:(" #OFS "*8)"
# define SEG_DECODE_READ(OFS)   SEG_READ(OFS) "\n\t" \
                                "rorq\t$17,%0\n\t" \
                                "xorq\t%%fs:48,%0"
# define SEG_ENCODE_WRITE(OFS)  "xorq\t%%fs:48,%0\n\t" \
                                "rolq\t$17,%0\n\t" \
                                SEG_WRITE(OFS)
#else
// For X32.
# define SEG_READ(OFS)          "movl\t%%fs:(" #OFS "*4),%0"
# define SEG_WRITE(OFS)         "movl\t%0,%%fs:(" #OFS "*4)"
# define SEG_DECODE_READ(OFS)   SEG_READ(OFS) "\n\t" \
                                "rorl\t$9,%0\n\t" \
                                "xorl\t%%fs:24,%0"
# define SEG_ENCODE_WRITE(OFS)  "xorl\t%%fs:24,%0\n\t" \
                                "roll\t$9,%0\n\t" \
                                SEG_WRITE(OFS)
#endif
#else
# define SEG_READ(OFS)  "movl\t%%gs:(" #OFS "*4),%0"
# define SEG_WRITE(OFS) "movl\t%0,%%gs:(" #OFS "*4)"
# define SEG_DECODE_READ(OFS)   SEG_READ(OFS) "\n\t" \
                                "rorl\t$9,%0\n\t" \
                                "xorl\t%%gs:24,%0"
# define SEG_ENCODE_WRITE(OFS)  "xorl\t%%gs:24,%0\n\t" \
                                "roll\t$9,%0\n\t" \
                                SEG_WRITE(OFS)
#endif

static inline struct gtm_thread *gtm_thr(void)
{
  struct gtm_thread *r;
  asm volatile (SEG_READ(10) : "=r"(r));
  return r;
}

static inline void set_gtm_thr(struct gtm_thread *x)
{
  asm volatile (SEG_WRITE(10) : : "r"(x));
}amespace GTM HIDDEN {

static inline struct abi_dispatch *abi_disp(void)
{
  struct abi_dispatch *r;
  asm volatile (SEG_DECODE_READ(11) : "=r"(r));
  return r;
}

static inline void set_abi_disp(struct abi_dispatch *x)
{
  void *scratch;
  asm volatile (SEG_ENCODE_WRITE(11) : "=r"(scratch) : "0"(x));
}

SEG_* macros are correct only for x86-64.
Comment 1 H.J. Lu 2018-05-30 03:40:55 UTC
The offsets of pointer_guard are:

i386:   24 bytes == 24 bytes
x32:    28 bytes != 24 bytes
x86_64: 48 bytes == 48 bytes
Comment 2 hjl@gcc.gnu.org 2018-06-12 11:09:24 UTC
Author: hjl
Date: Tue Jun 12 11:08:52 2018
New Revision: 261491

URL: https://gcc.gnu.org/viewcvs?rev=261491&root=gcc&view=rev
Log:
libitm/x86: Correct offsets of __private_tm and pointer_guard

In glibc, sysdeps/i386/nptl/tls.h has

typedef struct
{
  void *tcb;            /* Pointer to the TCB.  Not necessarily the
                           thread descriptor used by libpthread.  */
  dtv_t *dtv;
  void *self;           /* Pointer to the thread descriptor.  */
  int multiple_threads;
  uintptr_t sysinfo;
  uintptr_t stack_guard;
  uintptr_t pointer_guard;
  int gscope_flag;
  int __glibc_reserved1;
  /* Reservation of some values for the TM ABI.  */
  void *__private_tm[4];
  /* GCC split stack support.  */
  void *__private_ss;
} tcbhead_t;

and sysdeps/x86_64/nptl/tls.h has

typedef struct
{
  void *tcb;            /* Pointer to the TCB.  Not necessarily the
                           thread descriptor used by libpthread.  */
  dtv_t *dtv;
  void *self;           /* Pointer to the thread descriptor.  */
  int multiple_threads;
  int gscope_flag;
  uintptr_t sysinfo;
  uintptr_t stack_guard;
  uintptr_t pointer_guard;
  unsigned long int vgetcpu_cache[2];
  int __glibc_reserved1;
  int __glibc_unused1;
  /* Reservation of some values for the TM ABI.  */
  void *__private_tm[4];
  /* GCC split stack support.  */
  void *__private_ss;
  long int __glibc_reserved2;
  /* Must be kept even if it is no longer used by glibc since programs,
     like AddressSanitizer, depend on the size of tcbhead_t.  */
  __128bits __glibc_unused2[8][4] __attribute__ ((aligned (32)));

  void *__padding[8];
} tcbhead_t;

The offsets of __private_tm are

i386:   36 bytes
x32:    48 bytes
x86_64: 80 bytes

and the offsets of pointer_guard are:

i386:   24 bytes
x32:    28 bytes
x86_64: 48 bytes

But config/linux/x86/tls.h had

 #ifdef __x86_64__
 #ifdef __LP64__
 # define SEG_READ(OFS)          "movq\t%%fs:(" #OFS "*8),%0"
 # define SEG_WRITE(OFS)         "movq\t%0,%%fs:(" #OFS "*8)"
 # define SEG_DECODE_READ(OFS)   SEG_READ(OFS) "\n\t" \
                                 "rorq\t$17,%0\n\t" \
                                 "xorq\t%%fs:48,%0"
 # define SEG_ENCODE_WRITE(OFS)  "xorq\t%%fs:48,%0\n\t" \
                                 "rolq\t$17,%0\n\t" \
                                 SEG_WRITE(OFS)
 #else
 // For X32.
 # define SEG_READ(OFS)          "movl\t%%fs:(" #OFS "*4),%0"
 # define SEG_WRITE(OFS)         "movl\t%0,%%fs:(" #OFS "*4)"
 # define SEG_DECODE_READ(OFS)   SEG_READ(OFS) "\n\t" \
                                 "rorl\t$9,%0\n\t" \
                                 "xorl\t%%fs:24,%0"
 # define SEG_ENCODE_WRITE(OFS)  "xorl\t%%fs:24,%0\n\t" \
                                 "roll\t$9,%0\n\t" \
                                 SEG_WRITE(OFS)
 #endif
 #else
 # define SEG_READ(OFS)  "movl\t%%gs:(" #OFS "*4),%0"
 # define SEG_WRITE(OFS) "movl\t%0,%%gs:(" #OFS "*4)"
 # define SEG_DECODE_READ(OFS)   SEG_READ(OFS) "\n\t" \
                                 "rorl\t$9,%0\n\t" \
                                 "xorl\t%%gs:24,%0"
 # define SEG_ENCODE_WRITE(OFS)  "xorl\t%%gs:24,%0\n\t" \
                                 "roll\t$9,%0\n\t" \
                                 SEG_WRITE(OFS)
 #endif

static inline struct gtm_thread *gtm_thr(void)
{
  struct gtm_thread *r;
  asm volatile (SEG_READ(10) : "=r"(r));
  return r;
}

static inline void set_gtm_thr(struct gtm_thread *x)
{
  asm volatile (SEG_WRITE(10) : : "r"(x));
}

static inline struct abi_dispatch *abi_disp(void)
{
  struct abi_dispatch *r;
  asm volatile (SEG_DECODE_READ(11) : "=r"(r));
  return r;
}

static inline void set_abi_disp(struct abi_dispatch *x)
{
  void *scratch;
  asm volatile (SEG_ENCODE_WRITE(11) : "=r"(scratch) : "0"(x));
}

SEG_READ, SEG_WRITE, SEG_DECODE_READ and SEG_ENCODE_WRITE were correct
only for x86-64.

Update SEG_READ and SEG_WRITE to use the offset of __private_tm as base
and correct the offset of pointer_guard for x32.  This patch doesn't
change ABI of libitm.

	PR libitm/85988
	* config/linux/x86/tls.h (SEG_READ): Use the offset of
	__private_tm as base.
	(SEG_WRITE): Likewise.
	(SEG_ENCODE_WRITE): Correct the offset of pointer_guard for x32.
	(gtm_thr): Replace SEG_READ(10) with SEG_READ(0).
	(set_gtm_thr): Replace SEG_WRITE(10) with SEG_WRITE(0).
	(abi_disp): Replace SEG_DECODE_READ(11) with SEG_DECODE_READ(1).
	(set_abi_disp): Replace SEG_ENCODE_WRITE(11) with
	SEG_ENCODE_WRITE(1).

Modified:
    trunk/libitm/ChangeLog
    trunk/libitm/config/linux/x86/tls.h