On Linux/x86, r216154 generates more instructions with -O2 -fPIC for ---- struct cache_file { char magic[sizeof "ld.so-1.7.0" - 1]; unsigned int nlibs; }; typedef unsigned int size_t; size_t cachesize __attribute__ ((visibility ("hidden"))); struct cache_file *cache __attribute__ ((visibility ("hidden"))); extern int __munmap (void *__addr, size_t __len); void _dl_unload_cache (void) { if (cache != ((void *)0) && cache != (struct cache_file *) -1) { __munmap (cache, cachesize); cache = ((void *)0) ; } } ---- r216153 generates --- .text .LHOTB0: .p2align 4,,15 .globl _dl_unload_cache .type _dl_unload_cache, @function _dl_unload_cache: pushl %ebx call __x86.get_pc_thunk.bx addl $_GLOBAL_OFFSET_TABLE_, %ebx subl $8, %esp movl cache@GOTOFF(%ebx), %eax leal -1(%eax), %edx cmpl $-3, %edx ja .L1 subl $8, %esp pushl cachesize@GOTOFF(%ebx) pushl %eax call __munmap@PLT movl $0, cache@GOTOFF(%ebx) addl $16, %esp .L1: addl $8, %esp popl %ebx ret .size _dl_unload_cache, .-_dl_unload_cache .section .text.unlikely .LCOLDE0: .text .LHOTE0: .hidden cache .comm cache,4,4 .hidden cachesize .comm cachesize,4,4 .section .text.__x86.get_pc_thunk.bx,"axG",@progbits,__x86.get_pc_thunk.bx,comdat .globl __x86.get_pc_thunk.bx .hidden __x86.get_pc_thunk.bx .type __x86.get_pc_thunk.bx, @function __x86.get_pc_thunk.bx: movl (%esp), %ebx ret --- r216154 generates -- .text .LHOTB0: .p2align 4,,15 .globl _dl_unload_cache .type _dl_unload_cache, @function _dl_unload_cache: pushl %esi pushl %ebx call __x86.get_pc_thunk.si addl $_GLOBAL_OFFSET_TABLE_, %esi subl $4, %esp movl cache@GOTOFF(%esi), %eax leal -1(%eax), %edx cmpl $-3, %edx ja .L1 subl $8, %esp pushl cachesize@GOTOFF(%esi) movl %esi, %ebx pushl %eax call __munmap@PLT movl $0, cache@GOTOFF(%esi) addl $16, %esp .L1: addl $4, %esp popl %ebx popl %esi ret .size _dl_unload_cache, .-_dl_unload_cache .section .text.unlikely .LCOLDE0: .text .LHOTE0: .hidden cache .comm cache,4,4 .hidden cachesize .comm cachesize,4,4 .section .text.__x86.get_pc_thunk.si,"axG",@progbits,__x86.get_pc_thunk.si,comdat .globl __x86.get_pc_thunk.si .hidden __x86.get_pc_thunk.si .type __x86.get_pc_thunk.si, @function __x86.get_pc_thunk.si: movl (%esp), %esi ret -- Why doesn't r216154 simply use %ebx to access cache, cachesize and __munmap?
GCC uses 2 registers for GOT access, instead of one. One register is allocated by LRA and EBX is used by ix86_expand_call.
RA issue with PIC register, adding CC.
Still happens with r217599.
Author: vmakarov Date: Tue Nov 25 20:20:10 2014 New Revision: 218059 URL: https://gcc.gnu.org/viewcvs?rev=218059&root=gcc&view=rev Log: 2014-11-25 Vladimir Makarov <vmakarov@redhat.com> PR target/63527 * ira-lives.c (process_bb_node_lives): Check and remove conflict of pic pseudo with pic hard reg. Modified: trunk/gcc/ChangeLog trunk/gcc/ira-lives.c
Author: hjl Date: Tue Nov 25 20:54:16 2014 New Revision: 218061 URL: https://gcc.gnu.org/viewcvs?rev=218061&root=gcc&view=rev Log: Add a test for PR target/63527 PR target/63527 * gcc.target/i386/pr63527.c: New test. Added: trunk/gcc/testsuite/gcc.target/i386/pr63527.c Modified: trunk/gcc/testsuite/ChangeLog
Fixed.