when compiling following testcase void foo () { int N = 2; int slots[N]; } with -fstack-limit-register=r2 for ppc32 gcc ICEs $ powerpc-linux-uclibc-gcc-4.6.0 -fstack-limit-register=r2 a.c a.c: In function ‘foo’: a.c:6:1: error: unrecognizable insn: (insn 35 34 36 3 (set (reg:SI 144) (reg 2 2)) a.c:4 -1 (nil)) a.c:6:1: internal compiler error: in extract_insn, at recog.c:2109 Please submit a full bug report, with preprocessed source if appropriate. See <http://gcc.gnu.org/bugs.html> for instructions. Here is how I configured gcc Using built-in specs. COLLECT_GCC=powerpc-linux-uclibc-gcc-4.6.0 COLLECT_LTO_WRAPPER=/home/kraj/work/cross/powerpc-linux-uclibc/tools/libexec/gcc/powerpc-linux-uclibc/4.6.0/lto-wrapper Target: powerpc-linux-uclibc Configured with: /home/kraj/work/cross/powerpc-linux-uclibc/../../gcc.git/configure --target=powerpc-linux-uclibc --prefix=/home/kraj/work/cross/powerpc-linux-uclibc/tools --with-sysroot=/home/kraj/work/cross/powerpc-linux-uclibc/sysroot --enable-__cxa_atexit --disable-libssp --disable-libgomp --disable-libmudflap --enable-languages=c,c++ --disable-multilib
I could track it down to commit 148869 on trunk Step 1 of VSX changes: Powerpc infrstructure changes ChangeLog goes like this 2009-06-23 Michael Meissner <meissner@linux.vnet.ibm.com> Pat Haugen <pthaugen@us.ibm.com> Revital Eres <eres@il.ibm.com> * config.in (HAVE_AS_POPCNTD): Add default definition. (HAVE_AS_LWSYNC): Ditto. * configure.ac (gcc_cv_as_powerpc_mfpgpr): Provide real binutils release number. (gcc_cv_as_powerpc_cmpb): Ditto. (gcc_cv_as_powerpc_dfp): Ditto. (gcc_cv_as_powerpc_vsx): Ditto. (gcc_cv_as_powerpc_popcntd): Add feature test for assembler supporting the popcntd/lwsync instructions. (gcc_cv_as_powerpc_lwsync): Ditto. * configure: Regenerate. * config/rs6000/aix53.h (ASM_CPU_SPEC): Add support for -mcpu=native and -mcpu=power7. * config/rs6000/aix61.h (ASM_CPU_SPEC): Ditto. ...
Confirmed with current trunk.
Author: kelvin Date: Thu Jan 7 17:36:30 2016 New Revision: 232135 URL: https://gcc.gnu.org/viewcvs?rev=232135&root=gcc&view=rev Log: This branch holds development associated with work on bugzilla pr 48344. Added: branches/ibm/kelvin-pr48344/ - copied from r232134, trunk/
The ICE appears to be the missing mode on r2, but I thought that the SET would be generated by -fstack-limit-register common code. However, r2 is a fixed register for SVR4 ABI, so the specific choice of r2 seems strange. The user specifically wants a fixed register and knows that it will not be used for GOT access in this specific use case?
Author: kelvin Date: Tue Feb 16 23:12:19 2016 New Revision: 233477 URL: https://gcc.gnu.org/viewcvs?rev=233477&root=gcc&view=rev Log: [gcc] 2016-02-16 Kelvin Nilsen <kelvin@gcc.gnu.org> PR Target/48344 * opts-global.c (handle_common_deferred_options): Introduce and initialize two global variables to remember command-line options specifying a stack-limiting register. * opts.h: Add extern declarations of the two new global variables. * emit-rtl.c (init_emit_once): Initialize the stack_limit_rtx variable based on the values of the two new global variables. [gcc/testsuite] 2016-02-16 Kelvin Nilsen <kelvin@gcc.gnu.org> PR Target/48344 * gcc.target/powerpc/pr48344-1.c: New test. Added: trunk/gcc/testsuite/gcc.target/powerpc/pr48344-1.c Modified: trunk/gcc/ChangeLog trunk/gcc/emit-rtl.c trunk/gcc/opts-global.c trunk/gcc/opts.h trunk/gcc/testsuite/ChangeLog
Fixed.