Hi, here's the code: ``` typedef signed char int8_t; typedef unsigned char uint8_t; typedef signed short int int16_t; typedef unsigned short int uint16_t; typedef signed int int32_t; typedef unsigned int uint32_t; typedef signed long int int64_t; typedef unsigned long int uint64_t; /* --- Struct/Union Declarations --- */ struct S1 { uint32_t f0; int32_t f1; uint16_t f2; }; /* --- GLOBAL VARIABLES --- */ int32_t g_6 = 0xA0CEC519L; int32_t g_63[10] = {0x62155B98L,0xEEA2DBBAL,0xEEA2DBBAL,0x62155B98L,0xEEA2DBBAL,0xEEA2DBBAL,0x62155B98L,0xEEA2DBBAL,0xEEA2DBBAL,0x62155B98L}; struct S1 g_304 = {0x917144CEL,-8L,0x6D84L,-2L,0xD005B892436443A6LL,0xF5L,0x7EDC5F4166794133LL}; /* --- FORWARD DECLARATIONS --- */ void func_1() { int32_t b = 1; int32_t c; int8_t d; if (d = c = (uint16_t)((uint8_t)g_63[4] + b) - b) { uint16_t *e = &g_304.f0; *e = c; } } ``` compiled with gcc-13.2.0 -O3, generated binary is: https://godbolt.org/z/P9scnWqsa ``` 00000000004015f0 <func_1>: func_1(): /root/loadtest3/test/output2.c:43 4015f0: cmpb $0x0,0x2ab9(%rip) # 4040b0 <g_63+0x10> 4015f7: movzbl 0x2ab2(%rip),%eax # 4040b0 <g_63+0x10> 4015fe: je 401607 <func_1+0x17> /root/loadtest3/test/output2.c:45 401600: mov %ax,0x2a79(%rip) # 404080 <g_304> /root/loadtest3/test/output2.c:47 401607: retq 401608: nopl 0x0(%rax,%rax,1) ``` the compare and load instructions can swap and $eax can be used in the compare, instead of a memory access
Trying 7, 8, 9 -> 10: 7: r100:HI=zero_extend([const(`g_63'+0x10)]) 8: {r107:HI=r100:HI+0x1;clobber flags:CC;} REG_UNUSED flags:CC 9: r108:SI=zero_extend(r107:HI) REG_DEAD r107:HI 10: {r109:SI=r108:SI-0x1;clobber flags:CC;} REG_DEAD r108:SI REG_UNUSED flags:CC Failed to match this instruction: (parallel [ (set (reg:SI 109 [ c_8 ]) (zero_extend:SI (mem/c:QI (const:DI (plus:DI (symbol_ref:DI ("g_63") [flags 0x2] <var_decl 0x7f3809c10cf0 g_63>) (const_int 16 [0x10]))) [1 g_63D.2781[4]+0 S1 A128]))) (clobber (reg:CC 17 flags)) (set (reg:HI 100 [ _3 ]) (zero_extend:HI (mem/c:QI (const:DI (plus:DI (symbol_ref:DI ("g_63") [flags 0x2] <var_decl 0x7f3809c10cf0 g_63>) (const_int 16 [0x10]))) [1 g_63D.2781[4]+0 S1 A128]))) ]) Failed to match this instruction: (parallel [ (set (reg:SI 109 [ c_8 ]) (zero_extend:SI (mem/c:QI (const:DI (plus:DI (symbol_ref:DI ("g_63") [flags 0x2] <var_decl 0x7f3809c10cf0 g_63>) (const_int 16 [0x10]))) [1 g_63D.2781[4]+0 S1 A128]))) (set (reg:HI 100 [ _3 ]) (zero_extend:HI (mem/c:QI (const:DI (plus:DI (symbol_ref:DI ("g_63") [flags 0x2] <var_decl 0x7f3809c10cf0 g_63>) (const_int 16 [0x10]))) [1 g_63D.2781[4]+0 S1 A128]))) ]) Successfully matched this instruction: (set (reg:HI 100 [ _3 ]) (zero_extend:HI (mem/c:QI (const:DI (plus:DI (symbol_ref:DI ("g_63") [flags 0x2] <var_decl 0x7f3809c10cf0 g_63>) (const_int 16 [0x10]))) [1 g_63D.2781[4]+0 S1 A128]))) Successfully matched this instruction: (set (reg:SI 109 [ c_8 ]) (zero_extend:SI (mem/c:QI (const:DI (plus:DI (symbol_ref:DI ("g_63") [flags 0x2] <var_decl 0x7f3809c10cf0 g_63>) (const_int 16 [0x10]))) [1 g_63D.2781[4]+0 S1 A128]))) allowing combination of insns 7, 8, 9 and 10 original costs 9 + 4 + 4 + 4 = 21 replacement costs 9 + 9 = 18 deferring deletion of insn with uid = 8. deferring deletion of insn with uid = 7. modifying insn i2 9: r100:HI=zero_extend([const(`g_63'+0x10)]) deferring rescan insn with uid = 9. modifying insn i3 10: r109:SI=zero_extend([const(`g_63'+0x10)]) deferring rescan insn with uid = 10.