Bug 112476 - Unrecognizable insn with -O2 -march=la464 on loongarch64
Summary: Unrecognizable insn with -O2 -march=la464 on loongarch64
Status: RESOLVED FIXED
Alias: None
Product: gcc
Classification: Unclassified
Component: target (show other bugs)
Version: 14.0
: P3 normal
Target Milestone: 14.0
Assignee: Xi Ruoyao
URL: https://gcc.gnu.org/pipermail/gcc-pat...
Keywords: ice-on-valid-code, patch
Depends on:
Blocks:
 
Reported: 2023-11-10 11:58 UTC by WANG Xuerui
Modified: 2023-11-13 06:22 UTC (History)
2 users (show)

See Also:
Host:
Target: loongarch64-linux-gnu
Build:
Known to work:
Known to fail:
Last reconfirmed: 2023-11-11 00:00:00


Attachments
Minimized reproducer (1.21 KB, text/x-csrc)
2023-11-10 11:58 UTC, WANG Xuerui
Details

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Description WANG Xuerui 2023-11-10 11:58:22 UTC
Created attachment 56551 [details]
Minimized reproducer

The attached code minified from Skia, ICEs with "unrecognizable insn" when compiled with SIMD apparently active and the backend wanting to do something with it.

According to my preliminary debugging: the bug disappears when the extra layer of wrapping function is removed, when the two "&a" arguments get changed, and when the memcpy is rewritten to a simple pointer dereference.
Comment 1 Xi Ruoyao 2023-11-10 13:41:14 UTC
It's not a regression because GCC 13 does not support LSX.
Comment 2 Xi Ruoyao 2023-11-11 10:32:13 UTC
Confirmed with latest master.
Comment 3 Xi Ruoyao 2023-11-11 11:08:33 UTC
GCC internal says:

     ‘subreg’s of ‘subreg’s are not supported.  Using
     ‘simplify_gen_subreg’ is the recommended way to avoid this problem.
Comment 4 Xi Ruoyao 2023-11-11 16:49:57 UTC
The buggy nested subreg RTX is generated by LoongArch specific code loongarch_expand_vec_cond_mask_expr.

Draft patch:

diff --git a/gcc/config/loongarch/loongarch.cc b/gcc/config/loongarch/loongarch.cc
index d9b7a1076a2..0c7bafb5fb1 100644
--- a/gcc/config/loongarch/loongarch.cc
+++ b/gcc/config/loongarch/loongarch.cc
@@ -11197,7 +11197,9 @@ loongarch_expand_vec_cond_mask_expr (machine_mode mode, machine_mode vimode,
 	  if (mode != vimode)
 	    {
 	      xop1 = gen_reg_rtx (vimode);
-	      emit_move_insn (xop1, gen_rtx_SUBREG (vimode, operands[1], 0));
+	      emit_move_insn (xop1,
+			      simplify_gen_subreg (vimode, operands[1],
+						   mode, 0));
 	    }
 	  emit_move_insn (src1, xop1);
 	}
@@ -11214,7 +11216,9 @@ loongarch_expand_vec_cond_mask_expr (machine_mode mode, machine_mode vimode,
 	  if (mode != vimode)
 	    {
 	      xop2 = gen_reg_rtx (vimode);
-	      emit_move_insn (xop2, gen_rtx_SUBREG (vimode, operands[2], 0));
+	      emit_move_insn (xop2,
+			      simplify_gen_subreg (vimode, operands[2],
+						   mode, 0));
 	    }
 	  emit_move_insn (src2, xop2);
 	}
@@ -11233,7 +11237,8 @@ loongarch_expand_vec_cond_mask_expr (machine_mode mode, machine_mode vimode,
 			  gen_rtx_AND (vimode, mask, src1));
       /* The result is placed back to a register with the mask.  */
       emit_insn (gen_rtx_SET (mask, bsel));
-      emit_move_insn (operands[0], gen_rtx_SUBREG (mode, mask, 0));
+      emit_move_insn (operands[0], simplify_gen_subreg (mode, mask,
+							vimode, 0));
     }
 }
Comment 6 GCC Commits 2023-11-13 06:16:06 UTC
The master branch has been updated by Xi Ruoyao <xry111@gcc.gnu.org>:

https://gcc.gnu.org/g:b88500e0bc1e9e3a396ba764f9b701d22a76818f

commit r14-5374-gb88500e0bc1e9e3a396ba764f9b701d22a76818f
Author: Xi Ruoyao <xry111@xry111.site>
Date:   Sun Nov 12 00:55:13 2023 +0800

    LoongArch: Use simplify_gen_subreg instead of gen_rtx_SUBREG in loongarch_expand_vec_cond_mask_expr [PR112476]
    
    GCC internal says:
    
        'subreg's of 'subreg's are not supported.  Using
        'simplify_gen_subreg' is the recommended way to avoid this problem.
    
    Unfortunately loongarch_expand_vec_cond_mask_expr might create nested
    subreg under certain circumstances, causing an ICE.
    
    Use simplify_gen_subreg as the internal document suggests.
    
    gcc/ChangeLog:
    
            PR target/112476
            * config/loongarch/loongarch.cc
            (loongarch_expand_vec_cond_mask_expr): Call simplify_gen_subreg
            instead of gen_rtx_SUBREG.
    
    gcc/testsuite/ChangeLog:
    
            PR target/112476
            * gcc.target/loongarch/pr112476-1.c: New test.
            * gcc.target/loongarch/pr112476-2.c: New test.
Comment 7 Xi Ruoyao 2023-11-13 06:22:43 UTC
Fixed for trunk.