Bug 103773 - wrong code at -Oz due to sign extension
Summary: wrong code at -Oz due to sign extension
Status: RESOLVED FIXED
Alias: None
Product: gcc
Classification: Unclassified
Component: target (show other bugs)
Version: 12.0
: P3 normal
Target Milestone: 12.0
Assignee: Roger Sayle
URL:
Keywords: wrong-code
Depends on:
Blocks:
 
Reported: 2021-12-20 12:47 UTC by Zdenek Sojka
Modified: 2021-12-27 17:31 UTC (History)
3 users (show)

See Also:
Host: x86_64-pc-linux-gnu
Target: x86_64-pc-linux-gnu
Build:
Known to work:
Known to fail: 12.0
Last reconfirmed: 2021-12-20 00:00:00


Attachments
reduced testcase (113 bytes, text/plain)
2021-12-20 12:47 UTC, Zdenek Sojka
Details

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Description Zdenek Sojka 2021-12-20 12:47:26 UTC
Created attachment 52034 [details]
reduced testcase

Output:
$ x86_64-pc-linux-gnu-gcc -Oz testcase.c
$ ./a.out 
Aborted

$ x86_64-pc-linux-gnu-gcc -v
Using built-in specs.
COLLECT_GCC=/repo/gcc-trunk/binary-latest-amd64/bin/x86_64-pc-linux-gnu-gcc
COLLECT_LTO_WRAPPER=/repo/gcc-trunk/binary-trunk-r12-6072-20211220084313-g8d1e342b4af-checking-yes-rtl-df-extra-amd64/bin/../libexec/gcc/x86_64-pc-linux-gnu/12.0.0/lto-wrapper
Target: x86_64-pc-linux-gnu
Configured with: /repo/gcc-trunk//configure --enable-languages=c,c++ --enable-valgrind-annotations --disable-nls --enable-checking=yes,rtl,df,extra --with-cloog --with-ppl --with-isl --build=x86_64-pc-linux-gnu --host=x86_64-pc-linux-gnu --target=x86_64-pc-linux-gnu --with-ld=/usr/bin/x86_64-pc-linux-gnu-ld --with-as=/usr/bin/x86_64-pc-linux-gnu-as --disable-libstdcxx-pch --prefix=/repo/gcc-trunk//binary-trunk-r12-6072-20211220084313-g8d1e342b4af-checking-yes-rtl-df-extra-amd64
Thread model: posix
Supported LTO compression algorithms: zlib zstd
gcc version 12.0.0 20211220 (experimental) (GCC)
Comment 1 Roger Sayle 2021-12-20 14:03:49 UTC
Sorry. Mine. Bootstrapping and regression testing a fix now.
Comment 2 Jakub Jelinek 2021-12-20 14:21:49 UTC
Also:
int a;

void
foo (void)
{
  a = -42;
}
which corrupts some random unrelated memory.
For the TARGET_64BIT movsi case, it needs to be done only if the destination is a register rather than MEM.

Mostly unrelated, I wonder if we shouldn't have a separate TYPE_PUSHPOP, decide in the (set (attr "type") and then just emit it and get e.g. the "length" attribute right for it.
Comment 3 Roger Sayle 2021-12-21 15:32:53 UTC
Patch proposed
https://gcc.gnu.org/pipermail/gcc-patches/2021-December/587258.html
Comment 4 Zdenek Sojka 2021-12-21 15:50:16 UTC
(In reply to Roger Sayle from comment #3)
> Patch proposed
> https://gcc.gnu.org/pipermail/gcc-patches/2021-December/587258.html

Thank you for the patch. Does it work correctly with the red zone? I am asking since the "mov" instruction normally doesn't affect stack, and I don't see any indication that the "push" alternative does. But I definitely do not have enough knowledge about the GCC internals.
Comment 5 GCC Commits 2021-12-23 12:36:29 UTC
The master branch has been updated by Roger Sayle <sayle@gcc.gnu.org>:

https://gcc.gnu.org/g:ef26c151c14a87177d46fd3d725e7f82e040e89f

commit r12-6106-gef26c151c14a87177d46fd3d725e7f82e040e89f
Author: Roger Sayle <roger@nextmovesoftware.com>
Date:   Thu Dec 23 12:33:07 2021 +0000

    x86: PR target/103773: Fix wrong-code with -Oz from pop to memory.
    
    This is a fix to PR target/103773 where -Oz shouldn't use push/pop
    on x86 to shrink writing small integer constants to memory.
    Instead clang uses "andl $0, mem" for writing zero, and "orl $-1, mem"
    when writing -1 to memory when using -Oz.  This patch implements this
    via peephole2 where we can confirm that its ok to clobber the flags.
    
    2021-12-23  Roger Sayle  <roger@nextmovesoftware.com>
                Uroš Bizjak  <ubizjak@gmail.com>
    
    gcc/ChangeLog
            PR target/103773
            * config/i386/i386.md (*mov<mode>_and): New define_insn for
            writing a zero to memory using AND.
            (*mov<mode>_or): Extend to allow memory destination and HImode.
            (*movdi_internal): Remove -Oz push/pop optimization from here.
            (*movsi_internal): Likewise.
            (peephole2): Perform -Oz push/pop optimization here, only for
            register destinations, values other than zero, and in functions
            that don't used the red zone.
            (peephole2): With -Oz, convert writes of 0 or -1 to memory into
            their clobber forms, i.e. *mov<mode>_and and *mov<mode>_or resp.
    
    gcc/testsuite/ChangeLog
            PR target/103773
            * gcc.target/i386/pr103773-2.c: New test case.
            * gcc.target/i386/pr103773.c: New test case.
Comment 6 Roger Sayle 2021-12-27 17:31:20 UTC
This shoud now be fixed on mainline.