Bug 20097 - [4.0 regression] ICE in reload_cse_simplify_operands
Summary: [4.0 regression] ICE in reload_cse_simplify_operands
Status: RESOLVED FIXED
Alias: None
Product: gcc
Classification: Unclassified
Component: rtl-optimization (show other bugs)
Version: 4.0.0
: P2 normal
Target Milestone: 4.0.0
Assignee: Steven Bosscher
URL:
Keywords: ice-on-valid-code
: 20018 (view as bug list)
Depends on:
Blocks:
 
Reported: 2005-02-19 22:36 UTC by Andreas Schwab
Modified: 2012-12-19 10:07 UTC (History)
4 users (show)

See Also:
Host:
Target: ia64-suse-linux
Build:
Known to work:
Known to fail:
Last reconfirmed: 2005-02-20 00:09:20


Attachments
Testcase (26.11 KB, text/plain)
2005-02-19 22:37 UTC, Andreas Schwab
Details

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Description Andreas Schwab 2005-02-19 22:36:12 UTC
$ gcc/xgcc -v -B gcc -O2 -S md.i 
Reading specs from gcc/specs
Target: ia64-suse-linux
Configured with: ../configure --host=ia64-suse-linux --enable-shared --enable-threads --enable-__cxa_atexit --with-system-zlib --with-system-libunwind
Thread model: posix
gcc version 4.0.0 20050219 (experimental)
 gcc/cc1 -fpreprocessed md.i -quiet -dumpbase md.i -auxbase md -O2 -version -o md.s
GNU C version 4.0.0 20050219 (experimental) (ia64-suse-linux)
        compiled by GNU C version 4.0.0 20050219 (experimental).
GGC heuristics: --param ggc-min-expand=30 --param ggc-min-heapsize=4096
md.i: In function ‘do_md’:
md.i:3741: error: insn does not satisfy its constraints:
(insn 5989 5988 5990 236 (set (reg:SI 262 p6)
        (reg:SI 17 r17)) 4 {*movsi_internal} (nil)
    (nil))
md.i:3741: internal compiler error: in reload_cse_simplify_operands, at postreload.c:391
Please submit a full bug report,
with preprocessed source if appropriate.
See <URL:http://gcc.gnu.org/bugs.html> for instructions.


Broken by this change:

2005-02-06  Roger Sayle  <roger@eyesopen.com>
	    Andrew Pinski  <pinskia@physics.uc.edu>
	    Paolo Bonzini  <paolo.bonzini@lu.unisi.ch>

	* simplify-rtx.c (simplify_relational_operation_1): Simplify
	(ne:SI (zero_extract:SI FOO (const_int 1) BAR) (const_int 0))
	into just (zero_extract:SI FOO (const_int 1) BAR).
Comment 1 Andreas Schwab 2005-02-19 22:37:05 UTC
Created attachment 8236 [details]
Testcase
Comment 2 Andrew Pinski 2005-02-19 23:16:13 UTC
This seems more likely a target bug or a latent bug.
Comment 3 Andrew Pinski 2005-02-20 00:09:19 UTC
This looks like a reload (or a target reload) issue:
We have the following RTL:
(insn 4097 4096 4098 236 (set (reg:BI 2598)
        (and:BI (ne:BI (reg/v:SI 477 [ bNotLastFrame ])
                (const_int 0 [0x0]))
            (subreg:BI (reg:SI 2934) 0))) 66 {*cmpsi_and_0} (nil)
    (nil))

Note the subreg here.  We exand it to:
(insn 5994 4096 5995 236 (set (reg:SI 2 r2)        (reg:SI 131 f3 [2934])) 4 {*movsi_internal} (nil)    (nil)) 
(insn 5995 5994 5996 236 (set (reg:SI 262 p6)        (reg:SI 2 r2)) 4 {*movsi_internal} (nil)     (nil))
(insn 5996 5995 4097 236 (set (reg:SI 2 r2)
        (reg/v:SI 148 f20 [orig:477 bNotLastFrame ] [477])) 4 {*movsi_internal} (nil)     (nil))(insn 
4097 5996 4098 236 (set (reg:BI 262 p6 [2598])        (and:BI (ne:BI (reg:SI 2 r2)                 (const_int 0 
[0x0]))            (reg:BI 262 p6))) 66 {*cmpsi_and_0} (nil)     (nil))

So either we have a reload issue or we have a target issue.
Comment 4 GCC Commits 2005-02-23 18:21:06 UTC
Subject: Bug 20097

CVSROOT:	/cvs/gcc
Module name:	gcc
Changes by:	sayle@gcc.gnu.org	2005-02-23 18:20:53

Modified files:
	gcc            : ChangeLog simplify-rtx.c 

Log message:
	PR target/20018
	PR rtl-optimization/20097
	* simplify-rtx.c (simplify_relational_operation_1): Avoid creating
	BImode SUBREGs of SImode registers which confuse the ia64 backend.

Patches:
http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/ChangeLog.diff?cvsroot=gcc&r1=2.7571&r2=2.7572
http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/simplify-rtx.c.diff?cvsroot=gcc&r1=1.229&r2=1.230

Comment 5 Andrew Pinski 2005-02-23 18:39:29 UTC
Fixed.
Comment 6 Steven Bosscher 2012-12-19 10:07:08 UTC
(In reply to comment #3)
> This looks like a reload (or a target reload) issue:
> We have the following RTL:
> (insn 4097 4096 4098 236 (set (reg:BI 2598)
>         (and:BI (ne:BI (reg/v:SI 477 [ bNotLastFrame ])
>                 (const_int 0 [0x0]))
>             (subreg:BI (reg:SI 2934) 0))) 66 {*cmpsi_and_0} (nil)
>     (nil))
> 
> Note the subreg here.

Right, that makes no sense, and neither does...

> (insn 5995 5994 5996 236 (set (reg:SI 262 p6)
>       (reg:SI 2 r2)) 4 {*movsi_internal} (nil)     (nil))

this. Will look into this if I have some time.
Comment 7 Steven Bosscher 2012-12-19 10:07:41 UTC
*** Bug 20018 has been marked as a duplicate of this bug. ***