This is another fallout from the simplify-rtx.c change, where the fix for the fix causes another regression: * simplify-rtx.c (simplify_relational_operation_1): Avoid creating zero extensions of BImode operands. Call lowpart_subreg instead of gen_lowpart_common and gen_lowpart_SUBREG. $ gcc/xgcc -Wall -B gcc/ -O2 -S ex_getln.i ex_getln.i: In function ‘getcmdline’: ex_getln.i:4475: error: unable to find a register to spill in class ‘PR_REGS’ ex_getln.i:4475: error: this is the insn: (insn 5728 5721 5730 633 (set (reg:BI 262 p6 [2906]) (ior:BI (reg:BI 262 p6 [2900]) (subreg:BI (reg:SI 132 f4 [3004]) 0))) 63 {iorbi3} (insn_list:REG_DEP_TRUE 5721 (nil)) (expr_list:REG_DEAD (reg:BI 262 p6 [2900]) (nil))) ex_getln.i:4475: internal compiler error: in spill_failure, at reload1.c:1872
Created attachment 8209 [details] Somewhat reduced testcase
Subject: Bug 20018 CVSROOT: /cvs/gcc Module name: gcc Changes by: sayle@gcc.gnu.org 2005-02-23 18:20:53 Modified files: gcc : ChangeLog simplify-rtx.c Log message: PR target/20018 PR rtl-optimization/20097 * simplify-rtx.c (simplify_relational_operation_1): Avoid creating BImode SUBREGs of SImode registers which confuse the ia64 backend. Patches: http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/ChangeLog.diff?cvsroot=gcc&r1=2.7571&r2=2.7572 http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/simplify-rtx.c.diff?cvsroot=gcc&r1=1.229&r2=1.230
Fixed.
*** This bug has been marked as a duplicate of bug 20097 ***