Difficulties in merging patterns

[Jakub Jelinek]

On Thu, Jun 17, 2021 at 03:21:05PM +0200, Richard Biener wrote:
> but the difficulty is in the (const_int ..) operand to (vec_merge ..).
> I've tried sth like
> 
> (define_mode_attr addsub_cst [(V4DF "(const_int 5)") (V2DF "(const_int 
> 1)")
>                               (V4SF "(const_int 5)") (V8SF "(const_int 
> 85)")])

Have you tried making addsub_cst just "5" "1" or "85" and use (const_int
<addsub_cst>)?
If even that doesn't work, make it (match_operand ... "const_int_operand" "n")
and check the value in the insn condition using INTVAL (operands[xxx]) == <addsub_cst>
?

> (define_insn "vec_addsub<mode>"
>   [(set (match_operand:VF_128_256 0 "register_operand" "=x")
>         (vec_merge:VF_128_256
>           (minus:VF_128_256
>             (match_operand:VF_128_256 1 "register_operand" "x")
>             (match_operand:VF_128_256 2 "nonimmediate_operand" "xm"))
>           (plus:VF_128_256 (match_dup 1) (match_dup 2))
>           ADDSUB_CST))]
>   ""
>   "%vaddsub<ssemodesuffix>\t{%2, %1, %0|%0, %1, %2}"
> 
> but genpreds doesn't like whatever syntax I try to use at this place
> <addsub_cst> (<addsub_cst>), ...
> 
> Is this somehow possible and is there an existing example I can look at?
> 
> Thanks,
> Richard.

	Jakub