Difficulties in merging patterns

Richard Biener rguenther@suse.de
Thu Jun 17 13:21:05 GMT 2021


I'm trying to merge

(define_insn "avx_addsubv4df3"
  [(set (match_operand:V4DF 0 "register_operand" "=x")
        (vec_merge:V4DF
          (minus:V4DF
            (match_operand:V4DF 1 "register_operand" "x")
            (match_operand:V4DF 2 "nonimmediate_operand" "xm"))
          (plus:V4DF (match_dup 1) (match_dup 2))
          (const_int 5)))]
  "TARGET_AVX"
  "vaddsubpd\t{%2, %1, %0|%0, %1, %2}"
  [(set_attr "type" "sseadd")
   (set_attr "prefix" "vex")
   (set_attr "mode" "V4DF")])

(define_insn "sse3_addsubv2df3"
  [(set (match_operand:V2DF 0 "register_operand" "=x,x")
        (vec_merge:V2DF
          (minus:V2DF
            (match_operand:V2DF 1 "register_operand" "0,x")
            (match_operand:V2DF 2 "vector_operand" "xBm,xm"))
          (plus:V2DF (match_dup 1) (match_dup 2))
          (const_int 1)))]
  "TARGET_SSE3"
  "@
   addsubpd\t{%2, %0|%0, %2}
   vaddsubpd\t{%2, %1, %0|%0, %1, %2}"
  [(set_attr "isa" "noavx,avx")
   (set_attr "type" "sseadd")
   (set_attr "atom_unit" "complex")
   (set_attr "prefix" "orig,vex")
   (set_attr "mode" "V2DF")])

(define_insn "avx_addsubv8sf3"
  [(set (match_operand:V8SF 0 "register_operand" "=x")
        (vec_merge:V8SF
          (minus:V8SF
            (match_operand:V8SF 1 "register_operand" "x")
            (match_operand:V8SF 2 "nonimmediate_operand" "xm"))
          (plus:V8SF (match_dup 1) (match_dup 2))
          (const_int 85)))]
  "TARGET_AVX"
  "vaddsubps\t{%2, %1, %0|%0, %1, %2}"
  [(set_attr "type" "sseadd")
   (set_attr "prefix" "vex")
   (set_attr "mode" "V8SF")])

(define_insn "sse3_addsubv4sf3"
  [(set (match_operand:V4SF 0 "register_operand" "=x,x")
        (vec_merge:V4SF
          (minus:V4SF
            (match_operand:V4SF 1 "register_operand" "0,x")
            (match_operand:V4SF 2 "vector_operand" "xBm,xm"))
          (plus:V4SF (match_dup 1) (match_dup 2))
          (const_int 5)))]
  "TARGET_SSE3"
  "@
   addsubps\t{%2, %0|%0, %2}
   vaddsubps\t{%2, %1, %0|%0, %1, %2}"
  [(set_attr "isa" "noavx,avx")
   (set_attr "type" "sseadd")
   (set_attr "prefix" "orig,vex")
   (set_attr "prefix_rep" "1,*")
   (set_attr "mode" "V4SF")])

but the difficulty is in the (const_int ..) operand to (vec_merge ..).
I've tried sth like

(define_mode_attr addsub_cst [(V4DF "(const_int 5)") (V2DF "(const_int 
1)")
                              (V4SF "(const_int 5)") (V8SF "(const_int 
85)")])
(define_insn "vec_addsub<mode>"
  [(set (match_operand:VF_128_256 0 "register_operand" "=x")
        (vec_merge:VF_128_256
          (minus:VF_128_256
            (match_operand:VF_128_256 1 "register_operand" "x")
            (match_operand:VF_128_256 2 "nonimmediate_operand" "xm"))
          (plus:VF_128_256 (match_dup 1) (match_dup 2))
          ADDSUB_CST))]
  ""
  "%vaddsub<ssemodesuffix>\t{%2, %1, %0|%0, %1, %2}"

but genpreds doesn't like whatever syntax I try to use at this place
<addsub_cst> (<addsub_cst>), ...

Is this somehow possible and is there an existing example I can look at?

Thanks,
Richard.


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