MIPS & register allocation question

[Steve Ellcey]

On Thu, 2013-02-28 at 18:12 +0000, Richard Sandiford wrote:

> > I'll try your patch on some of my benchmarks and see what happens.
> 
> Thanks.

When I removed mips_order_regs_for_local_alloc I didn't see any
differences, when I changed the ordering of REG_ALLOC_ORDER I saw
a savings of a few bytes, but it was 32 bytes out of around 60000 in
the best case.  I didn't see anything increases in size though.

> > One interesting thing I have noticed (sizewise) is that not using t0-t7
> > at all in MIPS16 code resulted in a code size reduction of around 1%.
> 
> Hmm, yes indeed.  Certainly not what I'd have expected.  And an
> impressive difference for such a small change.
> 
> Have you managed to track down why?  Naively, a spill into a non-MIPS16
> GPR ought to be no worse than a spill to the stack, so I wonder what's
> going wrong.

I didn't do a detailed analysis of the differences but I think the
problem is that GCC is using them as 'normal' registers when in fact
they cost more to use then other registers because you have to move
things to other registers to operate on them.  So I saw a 'lot' of moves
in and out of these registers.  Without them I think GCC made better use
of the other registers and what should just stay in memory.  It would
be nice to use them just as 'spill registers' so that GCC could spill
to them when compiling a large basic block instead of using memory while
having GCC recognize that they are not 'normal' registers that you can
do operations on and should not be part of the normal register
allocation scheme.

Steve Ellcey