atomicity of x86 bt/bts/btr/btc?

Jay K jay.krell@cornell.edu
Tue Oct 19 07:42:00 GMT 2010


gcc-4.5/gcc/config/i386/i386.md:

;; %%% bts, btr, btc, bt.
;; In general these instructions are *slow* when applied to memory,
;; since they enforce atomic operation. When applied to registers,


I haven't found documented confirmation that these instructions are atomic without a lock prefix,
having checked Intel and AMD documentation and random web searching.
They are mentioned as instructions that can be used with lock prefix.


- Jay 		 	   		  



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