Questions about selective scheduler and PowerPC

[Jie Zhang]

Hi Andrey,

On 10/18/2010 03:13 PM, Andrey Belevantsev wrote:
> Hi Jie,
>
> On 18.10.2010 10:49, Jie Zhang wrote:
>>
>> When this error happens, FENCE_ISSUED_INSNS (fence) is 2 and
>> issue_rate is
>> 1. PowerPC 8540 is capable to issue 2 instructions in one cycle, but
>> rs6000_issue_rate lies to scheduler that it can only issue 1 instruction
>> before register relocation is done. See the following code:
>
> See PR 45352. I've tried to fix this in the selective scheduler by
> modeling the lying behavior in line with the haifa scheduler. Let me
> know if the last patch from the PR audit trail doesn't work for you.
>
> In addition, after the above patch goes in, I can make the selective
> scheduler not try to jump through the hoops with putting correct sched
> cycles on insns for targets which don't need it in their target_finish
> hook. I guess powerpc needs this though, but x86-64 (for which PR 45342
> was opened) almost surely does not.
>
Thanks for your reply. I just tried. That patch does not help for this 
issue.


-- 
Jie Zhang
CodeSourcery