Doubt about filling delay slot

[Ian Lance Taylor]

"Mohamed Shafi" <shafitvm@gmail.com> writes:

> On Thu, Apr 3, 2008 at 7:35 PM, Ian Lance Taylor <iant@google.com> wrote:
>> "Mohamed Shafi" <shafitvm@gmail.com> writes:
>>
>>
>> > Say the target has two delay slots for call instructions.
>>  > So we can have something like this
>>  > (define_attr "slottable" "no,yes,has_slot" (const_string "yes"))
>>  >
>>  > (define_delay (eq_attr "slottable" "has_slot")
>>  >   [(eq_attr "slottable" "yes") (nil) (nil)
>>  >    (eq_attr "slottable" "yes") (nil) (nil)])
>>  >
>>  > So in define_insn for call i can have
>>  > (set_attr "slottable" "has_slot")
>>  >
>>  >
>>  > Now imagine that i have 3 patterns : Pattern A with two instructions
>>  > in its template, Pattern B and Pattern C with only one instruction in
>>  > its template.
>>  > When it comes to filling the call instruction delay slot if slot 1 is
>>  > filled with Pattern A then there is no need to fill slot 2. But if its
>>  > filled with Pattern C or Pattern B, then slot 2 should be filled with
>>  > Pattern B or Pattern C, but not Pattern A.
>>  > Will i be able to do this in the back-end?
>>
>>  Ah, OK.  It's easy enough to say that you can't put pattern A in slot
>>  2.  But there is no way to say that if pattern A is in slot 1, then
>>  slot 2 is not available.
>>
> Ok i guess you are saying that this is not possible.
> But then this should be something that all the targets should deal
> with. How are they doing it?

It's not a standard problem.  On most machines a single insn does not
take up two slots.

To put it another way, you say that pattern A has two instructions in
its template, and I assumed that that was a requirement for some
reason.  If the instructions can be executed independently, then the
normal approach would be to use a define_split which runs after reload
to produce two insns for scheduling and delay slot filling.


> May be i can set the attribute "slottable" as 'no' for patterns with 3
> or more instructions and in DBR_OUTPUT_SEQEND or in
> TARGET_MACHINE_DEPENDENT_REORG check the delay slots and reorder the
> instructions if the slots are filled with 3 instructions ?

I wouldn't hold out a lot of hope for that approach.  I guess it might
work, but I think that jump threading would give you no end of
trouble.


> PS : Why is this not implemented? This seems like a standard
> requirement for the delay slots

On most machines define_split suffices.  I assumed that it wouldn't
work for you--if it does, do that.

I worked on a machine where certain instructions were required to come
in pairs.  In that case those instructions were uncommon, and I just
marked them as ineligible for delay slots.

Ian