GCC for 8051 based architectures

[Julia Nilsson]

The problem with accumulator based architecture or
harvard architecture where data memory and program
memory are seperately addressed by different buses, is
that memory operations are heavy also generating
memory offset takes lots of instructions.

load Dptr
add offset
store Dptr
<< access memory from Dptr >>
sub offset
store Dptr

If each insn is executed in one cycle and there is no
pipelining (which is the case for most of the
microcontrollers) then we have 6 insns for memory
read!!

I looked at sdcc but it is not fully ANSI compliant.
Moreover the level of optimizations supported are also
not so good.

~J

 --- Shaun Jackman <sjackman@pathwayconnect.com>
wrote: > For a similar port look at the Motorola
hc11/hc12
> port. Also, I'm not
> sure how relevant it is, but an open-source compiler
> for the 8051 exists
> by the name of sdcc (small device c compiler).
> 
> Cheers,
> Shaun
> 
> 
> On Fri, 2003-07-11 at 02:59, Julia Nilsson wrote:
> > Hi,
> > 
> > I wish to port GCC to an 8051 based
> microcontroller
> > port. I tried to serach the mailing list and found
> > that some time back somebody tried it but the port
> is
> > currently not available.
> >
> http://gcc.gnu.org/ml/gcc-help/2000-02/msg00104.html
> > 
> > Please tell me if anybody has ever done any work
> on
> > it.
> > 
> > I tried having a look at the GCC sources and found
> > that GCC is mainly for RISC acrchitecture with
> very
> > few microcontrollers supported like h8 and avr and
> > even these are not accumulator base
> > 
> > Julia
> > 
> > 
> >
>
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> > 
>  

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