Back end question.

Dmitry mittie@ukr.net
Thu May 5 12:51:00 GMT 2011


Ok but if people do not set each status bit individually, how do they set several not related bits in one CC mode and in one set rtx?

--- Èñõîäíîå ñîîáùåíèå ---
 Îò êîãî: "Ian Lance Taylor" <iant@google.com> 
 Êîìó: "Dmitry" <mittie@ukr.net> 
 Äàòà: 4 ìàÿ 2011, 22:40:20 
 Òåìà: Re: Back end question. 
 


> "Dmitry" <mittie@ukr.net> writes:
> 
> > Maybe it is better to use the separate CC modes for individual status bits, to reflect all status changes? For example 
> > I could define a CCZ mode for "zero" status bit, CCM mode for a "minus" status bit, and CCV mode for an "overflow" status bit. And then use a parallel of CC setters, like:
> > (parallel [
> > (set (reg:CCZ ST0_REGNO) (eq:HI (match_operand:HI 0 "register_operand" "") (const_int 0)))
> > (set (reg:CCM ST0_REGNO) (lt:HI (match_dup 0) (const_int 0)))
> > (set (reg:CCV ST0_REGNO) (gt:HI (match_dup 0) (const_int 65535)))
> > ]
> > )
> > And then the compiler could test CC reg for branch or conditional insns in any of defined above modes to check whether a corresponding bit is set or not?
> 
> You could do that, yes, but not like this. Instead, you would give a
> different register number to each status bit, and you would use them all
> in CCmode. The main reason people don't use this approach is that many
> instructions set several of the status bits.
> 
> Ian
> 
> 



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