Back end question.

[Ian Lance Taylor]

"Dmitry" <mittie@ukr.net> writes:

> Maybe it is better to use the separate CC modes for individual status bits, to reflect all status changes? For example 
> I could define a CCZ mode for "zero" status bit, CCM mode for a "minus" status bit, and CCV mode for an "overflow" status bit. And then use a parallel of CC setters, like:
> (parallel [
>            (set (reg:CCZ ST0_REGNO) (eq:HI (match_operand:HI 0 "register_operand" "") (const_int 0)))
>            (set (reg:CCM ST0_REGNO) (lt:HI (match_dup 0) (const_int 0)))
>            (set (reg:CCV ST0_REGNO) (gt:HI (match_dup 0) (const_int 65535)))
>           ]
> )
> And then the compiler could test CC reg for branch or conditional insns in any of defined above modes to check whether a corresponding bit is set or not?

You could do that, yes, but not like this.  Instead, you would give a
different register number to each status bit, and you would use them all
in CCmode.  The main reason people don't use this approach is that many
instructions set several of the status bits.

Ian