PRECISE gcc Intel conventions

[Andrew Haley]

Nick Maclaren writes:
 > Is there anything on the PRECISE gcc Intel conventions?  In this
 > context, I need to know exactly which registers and flags are
 > used for what and what the constraints are.  And that doesn't
 > mean just the visible ones, but the invisible ones, and any memory
 > locations used for stack linkage, state control etc.
 > 
 > What I am looking at is proper, mainframe-style exception handling,
 > which involves reverse engineering the stack frame that was
 > interrrupted and hooking the subsequent calls into it seamlessly.
 > I have done that, but it was under MVS on a System/370, and have
 > dabbled with a few other systems.  It is NOT easy and is NOT done
 > by any current Unix/Microsoft system I know of.

There are two sources of information.  

Firstly the System V ABI, which specifies the interface at function
entry and exit time.

Secondly, there's the DWARF unwinder data that is embedded in the
binary file for every executable and library.  As a general rule gcc
targets don't save stack linkage data in fixed registers, so anyone
who needs to unwind the stack must first decode the unwinder data to
determine where such information has been saved.

http://refspecs.freestandards.org/LSB_3.0.0/LSB-Core-IA32/LSB-Core-IA32/normativerefs.html

Andrew.