[gcc(refs/users/meissner/heads/work237-dmf)] Add support for dense math registers.

[Michael Meissner]

https://gcc.gnu.org/g:b11886b9a50a670dc0201325edf7c7e8bfc941f0

commit b11886b9a50a670dc0201325edf7c7e8bfc941f0
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Fri Feb 13 01:00:57 2026 -0500

    Add support for dense math registers.
    
    This patch adds the -mdense-math option for -mcpu=future.  The next set of
    patches will support for using dense math registers with the MMA instructions.
    
    gcc/
    
    2026-02-13   Michael Meissner  <meissner@linux.ibm.com>
    
            * config/rs6000/rs6000-c.cc (rs6000_define_or_undefine_macro): Define
            __DENSE_MATH__ if we have dense math registers.
            * config/rs6000/rs6000.cc (rs6000_option_override_internal): Do not
            allow -mdense-math unless -mcpu=future is used.
            (rs6000_opt_masks): Add -mdense-math support.
            * config/rs6000/rs6000.opt (-mdense-math): New option.
            * doc/invoke.texi (RS/6000 and PowerPC Options): Add -mdense-math.

Diff:
---
 gcc/config/rs6000/rs6000-c.cc |  4 ++++
 gcc/config/rs6000/rs6000.cc   | 10 ++++++++++
 gcc/config/rs6000/rs6000.opt  |  4 ++++
 3 files changed, 18 insertions(+)

diff --git a/gcc/config/rs6000/rs6000-c.cc b/gcc/config/rs6000/rs6000-c.cc
index eb6a881aa9bd..a7eb951b014d 100644
--- a/gcc/config/rs6000/rs6000-c.cc
+++ b/gcc/config/rs6000/rs6000-c.cc
@@ -590,6 +590,10 @@ rs6000_target_modify_macros (bool define_p, HOST_WIDE_INT flags)
   /* Tell the user if we support the MMA instructions.  */
   if ((flags & OPTION_MASK_MMA) != 0)
     rs6000_define_or_undefine_macro (define_p, "__MMA__");
+  /* Tell the user if we support the dense math registers for use with MMA and
+     cryptography.  */
+  if ((flags & OPTION_MASK_DENSE_MATH) != 0)
+    rs6000_define_or_undefine_macro (define_p, "__DENSE_MATH__");
   /* Whether pc-relative code is being generated.  */
   if ((flags & OPTION_MASK_PCREL) != 0)
     rs6000_define_or_undefine_macro (define_p, "__PCREL__");
diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index 3454a090dbc2..68d5e95179f7 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -4410,6 +4410,15 @@ rs6000_option_override_internal (bool global_init_p)
   if (!TARGET_PCREL && TARGET_PCREL_OPT)
     rs6000_isa_flags &= ~OPTION_MASK_PCREL_OPT;
 
+  /* Turn off dense math register support on non-future systems.  */
+  if (TARGET_DENSE_MATH && !TARGET_FUTURE)
+    {
+      if ((rs6000_isa_flags_explicit & OPTION_MASK_DENSE_MATH) != 0)
+	error ("%qs requires %qs", "-mdense-math", "-mcpu=future");
+
+      rs6000_isa_flags &= ~OPTION_MASK_DENSE_MATH;
+    }
+
   if (TARGET_DEBUG_REG || TARGET_DEBUG_TARGET)
     rs6000_print_isa_options (stderr, 0, "after subtarget", rs6000_isa_flags);
 
@@ -24463,6 +24472,7 @@ static struct rs6000_opt_mask const rs6000_opt_masks[] =
 								false, true  },
   { "cmpb",			OPTION_MASK_CMPB,		false, true  },
   { "crypto",			OPTION_MASK_CRYPTO,		false, true  },
+  { "dense-math",		OPTION_MASK_DENSE_MATH,		false, true  },
   { "direct-move",		0,				false, true  },
   { "dlmzb",			OPTION_MASK_DLMZB,		false, true  },
   { "efficient-unaligned-vsx",	OPTION_MASK_EFFICIENT_UNALIGNED_VSX,
diff --git a/gcc/config/rs6000/rs6000.opt b/gcc/config/rs6000/rs6000.opt
index 9f3519da77b2..436309bb09c5 100644
--- a/gcc/config/rs6000/rs6000.opt
+++ b/gcc/config/rs6000/rs6000.opt
@@ -639,6 +639,10 @@ mieee128-constant
 Target Var(TARGET_IEEE128_CONSTANT) Init(1) Save
 Generate (do not generate) code that uses the LXVKQ instruction.
 
+mdense_math
+Target Mask(DENSE_MATH) Var(rs6000_isa_flags)
+Generate (do not generate) instructions that use dense math registers.
+
 ; Documented parameters
 
 -param=rs6000-vect-unroll-limit=