[gcc r14-7024] arm: Add support for Arm Cortex-M52 CPU.

[Chung-Ju Wu]

https://gcc.gnu.org/g:6e249a9ad9d26fb01b147d33be9f9bfebca85c24

commit r14-7024-g6e249a9ad9d26fb01b147d33be9f9bfebca85c24
Author: Chung-Ju Wu <jasonwucj@gmail.com>
Date:   Tue Jan 9 14:26:18 2024 +0800

    arm: Add support for Arm Cortex-M52 CPU.
    
    This patch adds the -mcpu support for the Arm Cortex-M52 CPU which is
    an Armv8.1-M Mainline CPU supporting MVE and PACBTI by default.
    
    -mcpu=cortex-m52 switch by default matches to -march=armv8.1-m.main+pacbti+mve.fp+fp.dp.
    
    The cde feature is supported by specifying +cdecpN (e.g. -mcpu=cortex-m52+cdecp<N>),
    where N is the coprocessor number 0 to 7.
    
    Also following options are provided to disable default features.
    +nomve.fp (disables MVE Floating point)
    +nomve (disables MVE Integer and MVE Floating point)
    +nodsp (disables dsp, MVE Integer and MVE Floating point)
    +nopacbti (disables pacbti)
    +nofp (disables floating point and MVE floating point)
    
    Signed-off-by: Chung-Ju Wu <jasonwucj@gmail.com>
    
    gcc/ChangeLog:
    
            * config/arm/arm-cpus.in (cortex-m52): New cpu.
            * config/arm/arm-tables.opt: Regenerate.
            * config/arm/arm-tune.md: Regenerate.

Diff:
---
 gcc/config/arm/arm-cpus.in    | 21 +++++++++++++++++++++
 gcc/config/arm/arm-tables.opt |  3 +++
 gcc/config/arm/arm-tune.md    |  6 +++---
 3 files changed, 27 insertions(+), 3 deletions(-)

diff --git a/gcc/config/arm/arm-cpus.in b/gcc/config/arm/arm-cpus.in
index 6fa7e315ef0..451b15fe9f9 100644
--- a/gcc/config/arm/arm-cpus.in
+++ b/gcc/config/arm/arm-cpus.in
@@ -1641,6 +1641,27 @@ begin cpu cortex-m35p
  costs v7m
 end cpu cortex-m35p
 
+begin cpu cortex-m52
+ cname cortexm52
+ tune flags LDSCHED
+ architecture armv8.1-m.main+pacbti+mve.fp+fp.dp
+ option nopacbti remove pacbti
+ option nomve.fp remove mve_float
+ option nomve remove mve mve_float
+ option nofp remove ALL_FP mve_float
+ option nodsp remove MVE mve_float
+ option cdecp0 add cdecp0
+ option cdecp1 add cdecp1
+ option cdecp2 add cdecp2
+ option cdecp3 add cdecp3
+ option cdecp4 add cdecp4
+ option cdecp5 add cdecp5
+ option cdecp6 add cdecp6
+ option cdecp7 add cdecp7
+ isa quirk_no_asmcpu quirk_vlldm
+ costs v7m
+end cpu cortex-m52
+
 begin cpu cortex-m55
  cname cortexm55
  tune flags LDSCHED
diff --git a/gcc/config/arm/arm-tables.opt b/gcc/config/arm/arm-tables.opt
index 9d6ae875ede..d3eb9a97739 100644
--- a/gcc/config/arm/arm-tables.opt
+++ b/gcc/config/arm/arm-tables.opt
@@ -282,6 +282,9 @@ Enum(processor_type) String(cortex-m33) Value( TARGET_CPU_cortexm33)
 EnumValue
 Enum(processor_type) String(cortex-m35p) Value( TARGET_CPU_cortexm35p)
 
+EnumValue
+Enum(processor_type) String(cortex-m52) Value( TARGET_CPU_cortexm52)
+
 EnumValue
 Enum(processor_type) String(cortex-m55) Value( TARGET_CPU_cortexm55)
 
diff --git a/gcc/config/arm/arm-tune.md b/gcc/config/arm/arm-tune.md
index 7318f03b97e..6a631d82966 100644
--- a/gcc/config/arm/arm-tune.md
+++ b/gcc/config/arm/arm-tune.md
@@ -49,7 +49,7 @@
 	cortexa710,cortexx1,cortexx1c,
 	neoversen1,cortexa75cortexa55,cortexa76cortexa55,
 	neoversev1,neoversen2,cortexm23,
-	cortexm33,cortexm35p,cortexm55,
-	starmc1,cortexm85,cortexr52,
-	cortexr52plus"
+	cortexm33,cortexm35p,cortexm52,
+	cortexm55,starmc1,cortexm85,
+	cortexr52,cortexr52plus"
 	(const (symbol_ref "((enum attr_tune) arm_tune)")))