r242292 - in /branches/ARM/sve-branch/gcc: conf...

[rsandifo@gcc.gnu.org]

Author: rsandifo
Date: Fri Nov 11 17:34:59 2016
New Revision: 242292

URL: https://gcc.gnu.org/viewcvs?rev=242292&root=gcc&view=rev
Log:
[AArch64] Rework interface to add constant/offset routines

This patch changes aarch64_add_constant_internal so that it
takes separate source and destination registers, rather than
simply handling the case in which the two are the same.  It also
changes the temporary register from a register number to an rtx,
which is useful later for aarch64_internal_mov_immediate.
The temporary register may be null if no temporary is available.

The patch also makes aarch64_add_offset a simple wrapper
around aarch64_add_constant_internal.  The SVE patch will
put the handling of VL-based constants here.

The vcall_offset == 0 path in aarch64_output_mi_thunk
will use temp0 as well as temp1 once SVE is added.

A side-effect of the patch is that we now generate moves
instead of adds of zero in the pr70044.c test.

Modified:
    branches/ARM/sve-branch/gcc/config/aarch64/aarch64.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/pr70044.c