[Bug target/91052] [10 Regression] ICE in fix_reg_equiv_init, at ira.c:2705
cvs-commit at gcc dot gnu.org
gcc-bugzilla@gcc.gnu.org
Wed Feb 12 05:26:00 GMT 2020
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91052
--- Comment #16 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Kewen Lin <linkw@gcc.gnu.org>:
https://gcc.gnu.org/g:4d2248bec5d22061ab252724bd59d45c8a47e009
commit r10-6591-g4d2248bec5d22061ab252724bd59d45c8a47e009
Author: Kewen Lin <linkw@linux.ibm.com>
Date: Tue Feb 11 23:22:02 2020 -0600
[IRA] Fix PR91052 by skipping multiple_sets insn in combine_and_move_insns
As PR91052's comments show, commit r272731 exposed one issue in function
combine_and_move_insns. Function combine_and_move_insns perform the
unexpected movement which alter live interval of some register, leading
incorrect value to be used. See PR91052 for details.
2020-02-12 Kewen Lin <linkw@gcc.gnu.org>
PR target/91052
* ira.c (combine_and_move_insns): Skip multiple_sets def_insn.
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