[Bug target/91052] [10 Regression] ICE in fix_reg_equiv_init, at ira.c:2705
linkw at gcc dot gnu.org
gcc-bugzilla@gcc.gnu.org
Tue Feb 4 15:04:00 GMT 2020
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91052
Kewen Lin <linkw at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
CC| |bergner at gcc dot gnu.org,
| |segher at gcc dot gnu.org,
| |wschmidt at gcc dot gnu.org
Assignee|unassigned at gcc dot gnu.org |linkw at gcc dot gnu.org
--- Comment #15 from Kewen Lin <linkw at gcc dot gnu.org> ---
Thanks for your comments Alan! I've updated the patch listed below as your
suggestion:
diff --git a/gcc/ira.c b/gcc/ira.c
index c8b5f86..a655ae1 100644
--- a/gcc/ira.c
+++ b/gcc/ira.c
@@ -3784,6 +3784,11 @@ combine_and_move_insns (void)
if (can_throw_internal (def_insn))
continue;
+ /* Instructions with multiple sets can only be moved if DF analysis is
+ performed for all of the registers set. See PR91052. */
+ if (multiple_sets (def_insn))
+ continue;
+
basic_block use_bb = BLOCK_FOR_INSN (use_insn);
basic_block def_bb = BLOCK_FOR_INSN (def_insn);
if (bb_loop_depth (use_bb) > bb_loop_depth (def_bb))
Bootstrapped/regtested on powerpc64le-linux-gnu (LE), the testing on
ppc64-redhat-linux (BE) is still ongoing.
I'll send it to gcc-patches@ for review next week if no more comments received.
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