[Bug target/92846] [ARC] gloating point compares not generating Invalid Operand

[claziss at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92846

--- Comment #3 from claziss at gcc dot gnu.org ---
Author: claziss
Date: Thu Dec 12 08:42:21 2019
New Revision: 279274

URL: https://gcc.gnu.org/viewcvs?rev=279274&root=gcc&view=rev
Log:
[ARC] generate signaling FDCMPF for hard float comparisons

PR 92846:
ARC gcc generates FDCMP instructions which raises Invalid operation for
signaling NaN only. This causes glibc iseqsig() primitives to fail (in
the current ongoing glibc port to ARC)

So break up the hard float compares into tw categories and for unordered
compares generate the FDCMPF instructions which raised exception for
either NaNs.

With this fix testsuite/gcc.dg/torture/pr52451.c passes for ARC.

Also no regressions for the glibc math testsuite, only 6 additional
passes for test*iseqsig

gcc/
xxxx-xx-xx  Vineet Gupta  <vgupta@synopsys.com>

        * config/arc/arc-modes.def (CC_FPUE): New Mode CC_FPUE which
        helps codegen generate exceptions even for quiet NaN.
        * config/arc/arc.c (arc_init_reg_tables): Handle New CC_FPUE mode.
        (get_arc_condition_code): Likewise.
        (arc_select_cc_mode): LT, LE, GT, GE to use the New CC_FPUE mode.
        * config/arc/arc.h (REVERSE_CONDITION): Handle New CC_FPUE mode.
        * config/arc/predicates.md (proper_comparison_operator): Likewise.
        * config/arc/fpu.md (cmpsf_fpu_trap): New Pattern for CC_FPUE.
        (cmpdf_fpu_trap): Likewise.

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>

Modified:
    trunk/gcc/ChangeLog
    trunk/gcc/config/arc/arc-modes.def
    trunk/gcc/config/arc/arc.c
    trunk/gcc/config/arc/arc.h
    trunk/gcc/config/arc/fpu.md
    trunk/gcc/config/arc/predicates.md