[Bug target/70220] [x86] interrupt attribute optionally needs to provide read, write and control the set of saved registers

[hjl.tools at gmail dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70220

--- Comment #4 from H.J. Lu <hjl.tools at gmail dot com> ---
(In reply to Wink Saville from comment #0)
> I'm using the new C interrupt attribute for x86 and its working well. But
> when I expanded its use to include handling thread context switches, I found
> that its current implementation lacking.
> 
> When using an ISR for a thread context it is necessary to save and restore
> all registers but by default it saves a few as it thinks are necessary. It
> is possible to use the clobber list of inline assembly to tell the interrupt
> attribute code to save additional registers but you can't seem to mention
> the segment registers in that clobber list, thus to save these additional
> registers you must manually save them manually.
> 

Compiler doesn't use segment registers, except for TLS, which should
be used in ISR.  ISR needs to save and restore any registers, which
aren't used by compilers, if they are changed in ISR.