[Bug target/69176] [6 Regression] ICE in in final_scan_insn, at final.c:2981 on aarch64-linux-gnu
wdijkstr at arm dot com
gcc-bugzilla@gcc.gnu.org
Thu Jan 7 18:17:00 GMT 2016
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69176
--- Comment #7 from Wilco <wdijkstr at arm dot com> ---
> > I think the problem is the constraints on *add<mode>3_pluslong allows all immediates.
>
> I'm not sure what you mean here - there are 4 constraints that should all be
> true before the instruction is matched: GPI, aarch64_pluslong_immediate, 'i'
> and "!aarch64_plus_operand (operands[2], VOIDmode) && !aarch64_move_imm
> (INTVAL (operands[2]), <MODE>mode)".
It appears reload creates the instruction without doing the last check - this
is incorrect as it might be an instruction that is disabled (eg. not supported
by the selected architecture)...
However a trivial workaround is to always expand the pattern by changing the
"&& true" into "true". I'll post a patch.
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