[Bug target/69176] [6 Regression] ICE in in final_scan_insn, at final.c:2981 on aarch64-linux-gnu

[wdijkstr at arm dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69176

--- Comment #6 from Wilco <wdijkstr at arm dot com> ---
The failing instruction is:

(insn 121584 47646 47647 (set (reg:DI 1 x1 [88028])
        (plus:DI (reg/f:DI 29 x29)
            (const_int 129024 [0x1f800])))
src/../gen/yc20-dsp-standalone.cpp:10746 95 {*adddi3_pluslong}

This won't split as 0x1f800 is a valid move immediate (a mask). This means the
instruction does not match and should never have been created. I guess it gets
created correctly but then updated without rechecking the full constraints.

> I think the problem is the constraints on *add<mode>3_pluslong allows all immediates.

I'm not sure what you mean here - there are 4 constraints that should all be
true before the instruction is matched: GPI, aarch64_pluslong_immediate, 'i'
and "!aarch64_plus_operand (operands[2], VOIDmode) && !aarch64_move_imm (INTVAL
(operands[2]), <MODE>mode)".