[Bug target/69135] [5/6 Regression][ARM] instruction cannot be conditional -- `vcvtpne.s32.f32 s0,s0'
ktkachov at gcc dot gnu.org
gcc-bugzilla@gcc.gnu.org
Tue Jan 5 10:32:00 GMT 2016
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69135
ktkachov at gcc dot gnu.org changed:
What |Removed |Added
----------------------------------------------------------------------------
Target| |arm*
Status|NEW |ASSIGNED
CC| |ktkachov at gcc dot gnu.org
Known to work| |4.9.4
Assignee|unassigned at gcc dot gnu.org |ktkachov at gcc dot gnu.org
Target Milestone|--- |5.4
Summary|[5/6][ARM] instruction |[5/6 Regression][ARM]
|cannot be conditional -- |instruction cannot be
|`vcvtpne.s32.f32 s0,s0' |conditional --
| |`vcvtpne.s32.f32 s0,s0'
Known to fail| |5.3.1, 6.0
--- Comment #2 from ktkachov at gcc dot gnu.org ---
Confirmed, mine.
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